@@ -121,6 +121,9 @@
/* NAND_CTRL bits */
#define BAM_MODE_EN BIT(0)
+
+/* Value for NAND_DEV_CMD_VLD */
+#define NAND_DEV_CMD_VLD_VAL (0x1d)
/*
* the NAND controller performs reads/writes with ECC in 516 byte chunks.
* the driver calls the chunks 'step' or 'codeword' interchangeably
@@ -2676,6 +2679,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
/* kill onenand */
nandc_write(nandc, SFLASHC_BURST_CFG, 0);
+ nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
/* enable ADM or BAM DMA */
if (!nandc->dma_bam_enabled) {
The current driver is failing without complete bootchain in BAM mode since NAND_DEV_CMD_VLD value is not valid. So programmed the required value in NAND_DEV_CMD_VLD register. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> --- drivers/mtd/nand/qcom_nandc.c | 4 ++++ 1 file changed, 4 insertions(+)