Message ID | 1490228282-10805-15-git-send-email-yamada.masahiro@socionext.com |
---|---|
State | Accepted |
Commit | c5d664aa5a4c4b257a54eb35045031630d105f49 |
Delegated to: | Boris Brezillon |
Headers | show |
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index c4c3329..e13f959 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -669,6 +669,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_SEQIN: case NAND_CMD_STATUS: case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RESET: @@ -788,6 +789,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_SEQIN: case NAND_CMD_STATUS: case NAND_CMD_READID: + case NAND_CMD_SET_FEATURES: return; case NAND_CMD_RNDIN:
Set Features (0xEF) command toggles the R/B# pin after 4 sub feature parameters are written. Currently, nand_command(_lp) calls chip->dev_ready immediately after the address cycle because NAND_CMD_SET_FEATURES falls into default: label. No wait is needed at this point. If you see nand_onfi_set_features(), R/B# is already cared by the chip->waitfunc call. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- Changes in v2: - Newly added drivers/mtd/nand/nand_base.c | 2 ++ 1 file changed, 2 insertions(+)