Message ID | 1490228282-10805-14-git-send-email-yamada.masahiro@socionext.com |
---|---|
State | Accepted |
Commit | 3158fa0e739615769cc047d2428f30f4c3b6640e |
Delegated to: | Boris Brezillon |
Headers | show |
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 807398d..c4c3329 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -668,6 +668,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: return; case NAND_CMD_RESET: @@ -786,6 +787,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, case NAND_CMD_ERASE2: case NAND_CMD_SEQIN: case NAND_CMD_STATUS: + case NAND_CMD_READID: return; case NAND_CMD_RNDIN:
Read ID (0x90) command does not toggle the R/B# pin. Without this patch, NAND_CMD_READID falls into the default: label, then R/B# is checked by chip->dev_ready(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- Changes in v2: - Newly added drivers/mtd/nand/nand_base.c | 2 ++ 1 file changed, 2 insertions(+)