From patchwork Mon Jun 20 21:32:10 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hauke Mehrtens X-Patchwork-Id: 638308 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3rYPJJ0lVRz9t0M for ; Tue, 21 Jun 2016 07:34:24 +1000 (AEST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF6oJ-0000VY-Ag; Mon, 20 Jun 2016 21:32:47 +0000 Received: from hauke-m.de ([5.39.93.123]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1bF6oC-0000SA-AZ for linux-mtd@lists.infradead.org; Mon, 20 Jun 2016 21:32:41 +0000 Received: from hauke-desktop.lan (p2003008B2F7C1B006CCAEE2DACCD92C2.dip0.t-ipconnect.de [IPv6:2003:8b:2f7c:1b00:6cca:ee2d:accd:92c2]) by hauke-m.de (Postfix) with ESMTPSA id AF3C2100067; Mon, 20 Jun 2016 23:32:21 +0200 (CEST) From: Hauke Mehrtens To: boris.brezillon@free-electrons.com, richard@nod.at Subject: [PATCH v5 4/8] mtd: nand: xway: remove manual reset Date: Mon, 20 Jun 2016 23:32:10 +0200 Message-Id: <1466458334-10830-5-git-send-email-hauke@hauke-m.de> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1466458334-10830-1-git-send-email-hauke@hauke-m.de> References: <1466458334-10830-1-git-send-email-hauke@hauke-m.de> X-Spam-Status: No, score=0.0 required=7.0 tests=UNPARSEABLE_RELAY, URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on hauke-m.de X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160620_143240_583324_E60D61BE X-CRM114-Status: GOOD ( 10.92 ) X-Spam-Score: -3.3 (---) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-3.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -1.4 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mtd@lists.infradead.org, computersforpeace@gmail.com, dwmw2@infradead.org, Hauke Mehrtens , john@phrozen.org MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org nand_scan() already resets the NAND flash chip, this driver does not have to call it manually. The xway_reset_chip() functions does the same as the normal NAND reset function. The waiting for the NAND_WAIT_WR_C is done in xway_cmd_ctrl(). Signed-off-by: Hauke Mehrtens --- drivers/mtd/nand/xway_nand.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c index 6028edb..ab93b353 100644 --- a/drivers/mtd/nand/xway_nand.c +++ b/drivers/mtd/nand/xway_nand.c @@ -35,7 +35,6 @@ #define NAND_CMD_CS BIT(4) /* chip select */ #define NAND_CMD_SE BIT(5) /* spare area access latch */ #define NAND_CMD_WP BIT(6) /* write protect */ -#define NAND_WRITE_CMD_RESET 0xff #define NAND_WRITE_CMD (NAND_CMD_CS | NAND_CMD_CLE) #define NAND_WRITE_ADDR (NAND_CMD_CS | NAND_CMD_ALE) #define NAND_WRITE_DATA (NAND_CMD_CS) @@ -68,22 +67,6 @@ struct xway_nand_data { struct nand_chip chip; }; -static void xway_reset_chip(struct nand_chip *chip) -{ - unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W; - unsigned long flags; - - nandaddr &= ~NAND_WRITE_ADDR; - nandaddr |= NAND_WRITE_CMD; - - /* finish with a reset */ - spin_lock_irqsave(&ebu_lock, flags); - writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr); - while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) - ; - spin_unlock_irqrestore(&ebu_lock, flags); -} - static void xway_select_chip(struct mtd_info *mtd, int chip) { @@ -199,9 +182,6 @@ static int xway_nand_probe(struct platform_device *pdev) | NAND_CON_SE_P | NAND_CON_WP_P | NAND_CON_PRE_P | cs_flag, EBU_NAND_CON); - /* finish with a reset */ - xway_reset_chip(&data->chip); - /* Scan to find existence of the device */ err = nand_scan(mtd, 1); if (err)