From patchwork Fri Mar 4 09:48:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 591871 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B23111402BC for ; Fri, 4 Mar 2016 20:55:03 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b=O/CkY3ye; dkim-atps=neutral Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1abmOY-0004Bo-Oi; Fri, 04 Mar 2016 09:51:38 +0000 Received: from mail-wm0-x22c.google.com ([2a00:1450:400c:c09::22c]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1abmMQ-0001bB-1P for linux-mtd@lists.infradead.org; Fri, 04 Mar 2016 09:49:29 +0000 Received: by mail-wm0-x22c.google.com with SMTP id p65so12748961wmp.1 for ; Fri, 04 Mar 2016 01:49:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4Uc7O6eHAMFXvk5gHpsj9LppjmAzANjN8YG7ESazvXY=; b=O/CkY3yeOd1MEgipjywvM3U7LSjIrZx8iN9/lCpD1TFrfVIgQx8J1zqa/SblMVU4bu lVniVjAjM6alEj+vsV8R4LZKsDVewi3MpmUT9u+kCKOb7hoeJrGlCiOYbyEAkoqmS6FI 9PStX64a/b1IWoXv0PYW2ktMsO5gm1OCG98vk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=4Uc7O6eHAMFXvk5gHpsj9LppjmAzANjN8YG7ESazvXY=; b=Z8R9bhQ/ilrx3qMHrFVx2Amm0NZUKFuVydaOL8n+9lruPYVYZLVjLViyXs0zQl/8pJ ymHcyevwXC6kTMkxdKLXs2CqaRKuzNIx5o/sBEfhtG7IO5PLDrcL18c2TGm7Q5s0U8PM +ya9ZvL7WHMnV+MmqCVB36CfMmboW//jHwWsLBY15MRPy1OghZ5x+c1htkkGZkf3q29g tKsZ4muCgW4J8Iv8S0M7NVKpL/fKo+io24infUXvVcJ92Sbag6FnROU5uICi8qLSgM7q K3PKtm8Z6xavXZbKhZM8IjHspD4Za7BIWVU2B138P/nkWsVRHu0yidpglMH1J3hMgdMU boJw== X-Gm-Message-State: AD7BkJLo8SuQNm8bZzewe8UhdnldJqJ/qDjbkjB2o8h/oWdE2J8dkMGYDGGnlMDF3jkC5hn+ X-Received: by 10.194.8.38 with SMTP id o6mr7991897wja.31.1457084944536; Fri, 04 Mar 2016 01:49:04 -0800 (PST) Received: from localhost.localdomain ([195.55.142.58]) by smtp.gmail.com with ESMTPSA id s206sm2426533wmf.23.2016.03.04.01.49.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Mar 2016 01:49:03 -0800 (PST) From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org, linux-mtd@lists.infradead.org, linux@arm.linux.org.uk, dan.j.williams@intel.com Subject: [PATCH v3 4/4] ARM: memremap: implement arch_memremap_wb() Date: Fri, 4 Mar 2016 10:48:48 +0100 Message-Id: <1457084928-21179-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1457084928-21179-1-git-send-email-ard.biesheuvel@linaro.org> References: <1457084928-21179-1-git-send-email-ard.biesheuvel@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160304_014926_462994_3FE45017 X-CRM114-Status: GOOD ( 13.67 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:22c listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.jarzmik@free.fr, computersforpeace@gmail.com, dwmw2@infradead.org, Russell King , Ard Biesheuvel MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The generic memremap() falls back to using ioremap_cache() to create MEMREMAP_WB mappings if the requested region is not already covered by the linear mapping, unless the architecture provides an implementation of arch_memremap_wb(). Since ioremap_cache() is not appropriate on ARM to map memory with the same attributes used for the linear mapping, implement arch_memremap_wb() which does exactly that. Also, relax the WARN() check to allow MT_MEMORY_RW mappings of pfn_valid() pages. Cc: Russell King Signed-off-by: Ard Biesheuvel --- arch/arm/include/asm/io.h | 6 ++++++ arch/arm/mm/ioremap.c | 12 ++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index fb94de290edd..781ef5fe235d 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -392,6 +392,9 @@ void __iomem *ioremap(resource_size_t res_cookie, size_t size); #define ioremap ioremap #define ioremap_nocache ioremap +/* + * Do not use ioremap_cache for mapping memory. Use memremap instead. + */ void __iomem *ioremap_cache(resource_size_t res_cookie, size_t size); #define ioremap_cache ioremap_cache @@ -408,6 +411,9 @@ void __iomem *ioremap_wc(resource_size_t res_cookie, size_t size); void iounmap(volatile void __iomem *iomem_cookie); #define iounmap iounmap +void *arch_memremap_wb(phys_addr_t phys_addr, size_t size); +#define arch_memremap_wb arch_memremap_wb + /* * io{read,write}{16,32}be() macros */ diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index d5350f6af089..ff0eed23ddf1 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -297,9 +297,10 @@ static void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn, } /* - * Don't allow RAM to be mapped - this causes problems with ARMv6+ + * Don't allow RAM to be mapped with mismatched attributes - this + * causes problems with ARMv6+ */ - if (WARN_ON(pfn_valid(pfn))) + if (WARN_ON(pfn_valid(pfn) && mtype != MT_MEMORY_RW)) return NULL; area = get_vm_area_caller(size, VM_IOREMAP, caller); @@ -418,6 +419,13 @@ __arm_ioremap_exec(phys_addr_t phys_addr, size_t size, bool cached) __builtin_return_address(0)); } +void *arch_memremap_wb(phys_addr_t phys_addr, size_t size) +{ + return (__force void *)arch_ioremap_caller(phys_addr, size, + MT_MEMORY_RW, + __builtin_return_address(0)); +} + void __iounmap(volatile void __iomem *io_addr) { void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);