From patchwork Fri Dec 11 14:06:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 555777 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0FE3E140342 for ; Sat, 12 Dec 2015 01:08:15 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a7OLX-0007a6-RP; Fri, 11 Dec 2015 14:06:55 +0000 Received: from down.free-electrons.com ([37.187.137.238] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1a7OL2-00077A-3o; Fri, 11 Dec 2015 14:06:27 +0000 Received: by mail.free-electrons.com (Postfix, from userid 110) id 4D723274; Fri, 11 Dec 2015 15:06:02 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (AToulouse-657-1-5-91.w83-193.abo.wanadoo.fr [83.193.130.91]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2B63942; Fri, 11 Dec 2015 15:06:01 +0100 (CET) From: Boris Brezillon To: David Woodhouse , Brian Norris , linux-mtd@lists.infradead.org Subject: [PATCH v5 15/58] mtd: nand: denali: use the mtd instance embedded in struct nand_chip Date: Fri, 11 Dec 2015 15:06:00 +0100 Message-Id: <1449842760-30499-1-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1449734442-18672-16-git-send-email-boris.brezillon@free-electrons.com> References: <1449734442-18672-16-git-send-email-boris.brezillon@free-electrons.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20151211_060624_568353_E2CCB42F X-CRM114-Status: GOOD ( 27.10 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [37.187.137.238 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Lunn , Krzysztof Kozlowski , linux-doc@vger.kernel.org, Tony Lindgren , Nicolas Ferre , Stefan Agner , linux-sunxi@googlegroups.com, Alexandre Belloni , Robert Jarzmik , Alexander Clouter , devel@driverdev.osuosl.org, Boris Brezillon , Jesper Nilsson , linux-samsung-soc@vger.kernel.org, Maxim Levitsky , Jonathan Corbet , Marek Vasut , Chen-Yu Tsai , Kukjin Kim , Ezequiel Garcia , Jean-Christophe Plagniol-Villard , Sebastian Hesselbarth , Jason Cooper , Wan ZongShun , Steven Miao , Haojian Zhuang , Mikael Starvik , Krzysztof Halasa , Gregory CLEMENT , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Ryan Mallon , linux-cris-kernel@axis.com, Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Hartley Sweeten , Sascha Hauer , Maxime Ripard , Imre Kaloz , Shawn Guo , Daniel Mack MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org struct nand_chip now embeds an mtd device. Make use of this mtd instance. Signed-off-by: Boris Brezillon --- Changes since v4: - fix conflict after changes brought in v5 of patch 1 --- Changes generated with the following coccinelle script --->8--- virtual patch @fix1@ identifier __chipfield, __mtdfield; type __type; @@ ( __type { ... struct nand_chip __chipfield; ... - struct mtd_info __mtdfield; ... }; | __type { ... - struct mtd_info __mtdfield; ... struct nand_chip __chipfield; ... }; ) @fix2 depends on fix1@ identifier fix1.__chipfield, fix1.__mtdfield; identifier __subfield; type fix1.__type; __type *__priv; @@ ( - __priv->__mtdfield.__subfield + nand_to_mtd(&__priv->__chipfield)->__subfield | - &(__priv->__mtdfield) + nand_to_mtd(&__priv->__chipfield) ) --->8--- Conflicts: drivers/mtd/nand/denali.c --- drivers/mtd/nand/denali.c | 69 ++++++++++++++++++++++++++--------------------- drivers/mtd/nand/denali.h | 1 - 2 files changed, 38 insertions(+), 32 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index fdfea05..ccab8bc 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -75,7 +75,10 @@ MODULE_PARM_DESC(onfi_timing_mode, * this macro allows us to convert from an MTD structure to our own * device context (denali) structure. */ -#define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd) +static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd) +{ + return container_of(mtd_to_nand(mtd), struct denali_nand_info, nand); +} /* * These constants are defined by the driver to enable common driver @@ -986,6 +989,8 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, * than one NAND connected. */ if (err_byte < ECC_SECTOR_SIZE) { + struct mtd_info *mtd = + nand_to_mtd(&denali->nand); int offset; offset = (err_sector * @@ -995,7 +1000,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, err_device; /* correct the ECC error */ buf[offset] ^= err_correction_value; - denali->mtd.ecc_stats.corrected++; + mtd->ecc_stats.corrected++; bitflips++; } } else { @@ -1062,7 +1067,7 @@ static int write_page(struct mtd_info *mtd, struct nand_chip *chip, { struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = denali->buf.dma_buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_status; uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP | INTR_STATUS__PROGRAM_FAIL; @@ -1160,7 +1165,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = denali->buf.dma_buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_status; uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE | @@ -1193,14 +1198,14 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, denali_enable_dma(denali, false); if (check_erased_page) { - read_oob_data(&denali->mtd, chip->oob_poi, denali->page); + read_oob_data(mtd, chip->oob_poi, denali->page); /* check ECC failures that may have occurred on erased pages */ if (check_erased_page) { - if (!is_erased(buf, denali->mtd.writesize)) - denali->mtd.ecc_stats.failed++; - if (!is_erased(buf, denali->mtd.oobsize)) - denali->mtd.ecc_stats.failed++; + if (!is_erased(buf, mtd->writesize)) + mtd->ecc_stats.failed++; + if (!is_erased(buf, mtd->oobsize)) + mtd->ecc_stats.failed++; } } return max_bitflips; @@ -1211,7 +1216,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, { struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = denali->buf.dma_buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP; if (page != denali->page) { @@ -1428,6 +1433,7 @@ static void denali_drv_init(struct denali_nand_info *denali) int denali_init(struct denali_nand_info *denali) { + struct mtd_info *mtd = nand_to_mtd(&denali->nand); int ret; if (denali->platform == INTEL_CE4100) { @@ -1447,7 +1453,7 @@ int denali_init(struct denali_nand_info *denali) if (!denali->buf.buf) return -ENOMEM; - denali->mtd.dev.parent = denali->dev; + mtd->dev.parent = denali->dev; denali_hw_init(denali); denali_drv_init(denali); @@ -1463,8 +1469,8 @@ int denali_init(struct denali_nand_info *denali) /* now that our ISR is registered, we can enable interrupts */ denali_set_intr_modes(denali, true); - denali->mtd.name = "denali-nand"; - denali->mtd.priv = &denali->nand; + mtd->name = "denali-nand"; + mtd->priv = &denali->nand; /* register the driver with the NAND core subsystem */ denali->nand.select_chip = denali_select_chip; @@ -1477,7 +1483,7 @@ int denali_init(struct denali_nand_info *denali) * this is the first stage in a two step process to register * with the nand subsystem */ - if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) { + if (nand_scan_ident(mtd, denali->max_banks, NULL)) { ret = -ENXIO; goto failed_req_irq; } @@ -1485,7 +1491,7 @@ int denali_init(struct denali_nand_info *denali) /* allocate the right size buffer now */ devm_kfree(denali->dev, denali->buf.buf); denali->buf.buf = devm_kzalloc(denali->dev, - denali->mtd.writesize + denali->mtd.oobsize, + mtd->writesize + mtd->oobsize, GFP_KERNEL); if (!denali->buf.buf) { ret = -ENOMEM; @@ -1500,7 +1506,7 @@ int denali_init(struct denali_nand_info *denali) } denali->buf.dma_buf = dma_map_single(denali->dev, denali->buf.buf, - denali->mtd.writesize + denali->mtd.oobsize, + mtd->writesize + mtd->oobsize, DMA_BIDIRECTIONAL); if (dma_mapping_error(denali->dev, denali->buf.dma_buf)) { dev_err(denali->dev, "Spectra: failed to map DMA buffer\n"); @@ -1521,10 +1527,10 @@ int denali_init(struct denali_nand_info *denali) denali->nand.bbt_erase_shift += (denali->devnum - 1); denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift; denali->nand.chip_shift += (denali->devnum - 1); - denali->mtd.writesize <<= (denali->devnum - 1); - denali->mtd.oobsize <<= (denali->devnum - 1); - denali->mtd.erasesize <<= (denali->devnum - 1); - denali->mtd.size = denali->nand.numchips * denali->nand.chipsize; + mtd->writesize <<= (denali->devnum - 1); + mtd->oobsize <<= (denali->devnum - 1); + mtd->erasesize <<= (denali->devnum - 1); + mtd->size = denali->nand.numchips * denali->nand.chipsize; denali->bbtskipbytes *= denali->devnum; /* @@ -1551,16 +1557,16 @@ int denali_init(struct denali_nand_info *denali) * SLC if possible. * */ if (!nand_is_slc(&denali->nand) && - (denali->mtd.oobsize > (denali->bbtskipbytes + - ECC_15BITS * (denali->mtd.writesize / + (mtd->oobsize > (denali->bbtskipbytes + + ECC_15BITS * (mtd->writesize / ECC_SECTOR_SIZE)))) { /* if MLC OOB size is large enough, use 15bit ECC*/ denali->nand.ecc.strength = 15; denali->nand.ecc.layout = &nand_15bit_oob; denali->nand.ecc.bytes = ECC_15BITS; iowrite32(15, denali->flash_reg + ECC_CORRECTION); - } else if (denali->mtd.oobsize < (denali->bbtskipbytes + - ECC_8BITS * (denali->mtd.writesize / + } else if (mtd->oobsize < (denali->bbtskipbytes + + ECC_8BITS * (mtd->writesize / ECC_SECTOR_SIZE))) { pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes"); goto failed_req_irq; @@ -1574,11 +1580,11 @@ int denali_init(struct denali_nand_info *denali) denali->nand.ecc.bytes *= denali->devnum; denali->nand.ecc.strength *= denali->devnum; denali->nand.ecc.layout->eccbytes *= - denali->mtd.writesize / ECC_SECTOR_SIZE; + mtd->writesize / ECC_SECTOR_SIZE; denali->nand.ecc.layout->oobfree[0].offset = denali->bbtskipbytes + denali->nand.ecc.layout->eccbytes; denali->nand.ecc.layout->oobfree[0].length = - denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes - + mtd->oobsize - denali->nand.ecc.layout->eccbytes - denali->bbtskipbytes; /* @@ -1586,7 +1592,7 @@ int denali_init(struct denali_nand_info *denali) * contained by each nand chip. blksperchip will help driver to * know how many blocks is taken by FW. */ - denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift; + denali->totalblks = mtd->size >> denali->nand.phys_erase_shift; denali->blksperchip = denali->totalblks / denali->nand.numchips; /* override the default read operations */ @@ -1599,12 +1605,12 @@ int denali_init(struct denali_nand_info *denali) denali->nand.ecc.write_oob = denali_write_oob; denali->nand.erase = denali_erase; - if (nand_scan_tail(&denali->mtd)) { + if (nand_scan_tail(mtd)) { ret = -ENXIO; goto failed_req_irq; } - ret = mtd_device_register(&denali->mtd, NULL, 0); + ret = mtd_device_register(mtd, NULL, 0); if (ret) { dev_err(denali->dev, "Spectra: Failed to register MTD: %d\n", ret); @@ -1622,9 +1628,10 @@ EXPORT_SYMBOL(denali_init); /* driver exit point */ void denali_remove(struct denali_nand_info *denali) { - int bufsize = denali->mtd.writesize + denali->mtd.oobsize; + struct mtd_info *mtd = nand_to_mtd(&denali->nand); + int bufsize = mtd->writesize + mtd->oobsize; - nand_release(&denali->mtd); + nand_release(mtd); denali_irq_cleanup(denali->irq, denali); dma_unmap_single(denali->dev, denali->buf.dma_buf, bufsize, DMA_BIDIRECTIONAL); diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 4b12cd3..e7ab486 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -450,7 +450,6 @@ struct nand_buf { #define DT 3 struct denali_nand_info { - struct mtd_info mtd; struct nand_chip nand; int flash_bank; /* currently selected chip */ int status;