| Message ID | 1435829876-18149-1-git-send-email-alexander.stein@systec-electronic.com |
|---|---|
| State | Accepted |
| Commit | 038761dfe4ce145f0f080cc08ee43f6e0ab3ae2f |
| Headers | show |
On Thu, Jul 02, 2015 at 11:37:56AM +0200, Alexander Stein wrote: > QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO. > > Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Pushed to l2-mtd.git, thanks. Brian
diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 5d5d362..d8349cd 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -537,7 +537,7 @@ static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor, /* clear the TX FIFO. */ tmp = readl(q->iobase + QUADSPI_MCR); - writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR); + writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR); /* fill the TX data to the FIFO */ for (j = 0, i = ((count + 3) / 4); j < i; j++) {
QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)