From patchwork Fri Jan 16 14:48:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Archit Taneja X-Patchwork-Id: 429876 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 183D81400D5 for ; Sat, 17 Jan 2015 01:50:35 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YC8Cn-0000gy-3X; Fri, 16 Jan 2015 14:48:57 +0000 Received: from smtp.codeaurora.org ([198.145.11.231]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YC8Ck-0000aJ-BB for linux-mtd@lists.infradead.org; Fri, 16 Jan 2015 14:48:55 +0000 Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id BA284141036; Fri, 16 Jan 2015 14:48:37 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id A2FC114103B; Fri, 16 Jan 2015 14:48:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.1 Received: from localhost (unknown [202.46.23.60]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: architt@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id CC372141036; Fri, 16 Jan 2015 14:48:34 +0000 (UTC) From: Archit Taneja To: linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org Subject: [PATCH 1/5] clk: qcom: Add EBI2 clocks for IPQ806x Date: Fri, 16 Jan 2015 20:18:18 +0530 Message-Id: <1421419702-17812-2-git-send-email-architt@codeaurora.org> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1421419702-17812-1-git-send-email-architt@codeaurora.org> References: <1421419702-17812-1-git-send-email-architt@codeaurora.org> X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150116_064854_454263_AC53B2C4 X-CRM114-Status: GOOD ( 12.31 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain Cc: Archit Taneja , galak@codeaurora.org, Stephen Boyd , linux-kernel@vger.kernel.org, agross@codeaurora.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The NAND controller within EBI2 requires EBI2_CLK and EBI2_ALWAYS_ON_CLK clocks. Create structs for these clocks so that they can be used by the NAND controller driver. Add an entry for EBI2_AON_CLK in the gcc-ipq806x DT binding document. Cc: Stephen Boyd Signed-off-by: Archit Taneja --- drivers/clk/qcom/gcc-ipq806x.c | 34 ++++++++++++++++++++++++++++ include/dt-bindings/clock/qcom,gcc-ipq806x.h | 1 + 2 files changed, 35 insertions(+) diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index afed5eb..7db54c8 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -2159,6 +2159,38 @@ static struct clk_branch usb_fs1_h_clk = { }, }; +static struct clk_branch ebi2_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 1, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(4), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + +static struct clk_branch ebi2_aon_clk = { + .hwcg_reg = 0x3b00, + .hwcg_bit = 6, + .halt_reg = 0x2fcc, + .halt_bit = 0, + .clkr = { + .enable_reg = 0x3b00, + .enable_mask = BIT(8), + .hw.init = &(struct clk_init_data){ + .name = "ebi2_always_on_clk", + .ops = &clk_branch_ops, + .flags = CLK_IS_ROOT, + }, + }, +}; + static struct clk_regmap *gcc_ipq806x_clks[] = { [PLL0] = &pll0.clkr, [PLL0_VOTE] = &pll0_vote, @@ -2261,6 +2293,8 @@ static struct clk_regmap *gcc_ipq806x_clks[] = { [USB_FS1_XCVR_SRC] = &usb_fs1_xcvr_clk_src.clkr, [USB_FS1_XCVR_CLK] = &usb_fs1_xcvr_clk.clkr, [USB_FS1_SYSTEM_CLK] = &usb_fs1_sys_clk.clkr, + [EBI2_CLK] = &ebi2_clk.clkr, + [EBI2_AON_CLK] = &ebi2_aon_clk.clkr, }; static const struct qcom_reset_map gcc_ipq806x_resets[] = { diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h index b857cad..858a47f 100644 --- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h +++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h @@ -289,5 +289,6 @@ #define UBI32_CORE2_CLK_SRC 278 #define UBI32_CORE1_CLK 279 #define UBI32_CORE2_CLK 280 +#define EBI2_AON_CLK 281 #endif