From patchwork Tue Feb 18 14:55:46 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lee Jones X-Patchwork-Id: 321580 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 2DB872C00B8 for ; Wed, 19 Feb 2014 04:33:47 +1100 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFmQH-0001QS-ID; Tue, 18 Feb 2014 15:17:25 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFmPt-0000sP-2z; Tue, 18 Feb 2014 15:17:01 +0000 Received: from bombadil.infradead.org ([2001:1868:205::9]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFmLf-0000R3-Ny for linux-mtd@merlin.infradead.org; Tue, 18 Feb 2014 15:12:39 +0000 Received: from mail-wi0-f178.google.com ([209.85.212.178]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WFm7B-0008V6-1L for linux-mtd@lists.infradead.org; Tue, 18 Feb 2014 14:57:41 +0000 Received: by mail-wi0-f178.google.com with SMTP id cc10so3565515wib.11 for ; Tue, 18 Feb 2014 06:57:17 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/17OG97hK/B9pIREJd6H+TVu6s8CxUmCecFN3ZUVQpI=; b=Wh2dcmUued5fK8Jjep/ROMXKFGqnbix1RmM4wJtPisp12jZcovzVSMTBc+hykvN8XB 08LdaiIHR+V9eVxShq/l1WvEIQvxZxEs64A9ySD2kQFPT54ibs7/NPfQ8vp2XCechpgZ KepV7uCn5+e4dpIVi355S559uQSAAWGwlngHqb5au/eNrgjnDsFgQdfUoga5GMGRap1Z sfQBbRrzYmwZ/lirysVEwlZgvfwLaUcxcni9lpQMAp7QnXTGYonq/jCjnnuB8aOlhyHh f0v+uqLG1BtKuQh8nTjCOtwGmRWP1/hwg0eLqZuYcJj2pHuVTDoY4BfZwYnlhs9jjMIz aQ2A== X-Gm-Message-State: ALoCoQktoE536TKeFXaqjOdohS8FB6RDxZ/bNnSaGvklFj5rVPynxrK5VeRqnIyR+/b7+MhoaI9b X-Received: by 10.194.81.196 with SMTP id c4mr2650518wjy.57.1392735437222; Tue, 18 Feb 2014 06:57:17 -0800 (PST) Received: from localhost.localdomain ([80.76.198.141]) by mx.google.com with ESMTPSA id h13sm46039687wjr.22.2014.02.18.06.57.15 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 18 Feb 2014 06:57:16 -0800 (PST) From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 19/35] mtd: st_spi_fsm: Provide a method to put the chip into 32bit addressing mode Date: Tue, 18 Feb 2014 14:55:46 +0000 Message-Id: <1392735362-1245-20-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1392735362-1245-1-git-send-email-lee.jones@linaro.org> References: <1392735362-1245-1-git-send-email-lee.jones@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140218_065741_229596_1706D49D X-CRM114-Status: GOOD ( 10.06 ) X-Spam-Score: -0.7 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (-0.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.212.178 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record Cc: Angus.Clark@st.com, lee.jones@linaro.org, DCG_UPD_stlinux_kernel@list.st.com, linux-mtd@lists.infradead.org, computersforpeace@gmail.com, dwmw2@infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Most Serial Flash chips support 24bit addressing as a default but more recent incarnations can support 32bit. Based on information provided though platform specific data and capabilities we can determine whether or not our current chip can. This patch provides a means to setup the FSM message sequence to put the chip into 32bit mode. Acked-by Angus Clark Signed-off-by: Lee Jones --- drivers/mtd/devices/st_spi_fsm.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index b9e7061..e20f4cb 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c @@ -375,6 +375,8 @@ static struct flash_info flash_types[] = { { NULL, 0x000000, 0, 0, 0, 0, 0, NULL }, }; +static struct stfsm_seq stfsm_seq_en_32bit_addr;/* Dynamically populated */ + static struct stfsm_seq stfsm_seq_read_jedec = { .data_size = TRANSFER_SIZE(8), .seq_opc[0] = (SEQ_OPC_PADS_1 | @@ -523,6 +525,23 @@ static void stfsm_read_fifo(struct stfsm *fsm, uint32_t *buf, } } +static int stfsm_enter_32bit_addr(struct stfsm *fsm, int enter) +{ + struct stfsm_seq *seq = &stfsm_seq_en_32bit_addr; + uint32_t cmd = enter ? FLASH_CMD_EN4B_ADDR : FLASH_CMD_EX4B_ADDR; + + seq->seq_opc[0] = (SEQ_OPC_PADS_1 | + SEQ_OPC_CYCLES(8) | + SEQ_OPC_OPCODE(cmd) | + SEQ_OPC_CSDEASSERT); + + stfsm_load_seq(fsm, seq); + + stfsm_wait_seq(fsm); + + return 0; +} + /* * SoC reset on 'boot-from-spi' systems *