From patchwork Fri Dec 6 14:24:45 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Poddar, Sourav" X-Patchwork-Id: 298027 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from casper.infradead.org (unknown [IPv6:2001:770:15f::2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id F10812C0095 for ; Sat, 7 Dec 2013 01:26:29 +1100 (EST) Received: from merlin.infradead.org ([2001:4978:20e::2]) by casper.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VowM0-0005JC-WD; Fri, 06 Dec 2013 14:26:05 +0000 Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1VowLq-0007PE-9u; Fri, 06 Dec 2013 14:25:54 +0000 Received: from devils.ext.ti.com ([198.47.26.153]) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1VowLj-0007Jj-8O for linux-mtd@lists.infradead.org; Fri, 06 Dec 2013 14:25:48 +0000 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id rB6EPHPA023425; Fri, 6 Dec 2013 08:25:17 -0600 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id rB6EPHPI015631; Fri, 6 Dec 2013 08:25:17 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.2.342.3; Fri, 6 Dec 2013 08:25:17 -0600 Received: from a0131647.apr.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id rB6EOqhA000982; Fri, 6 Dec 2013 08:25:14 -0600 From: Sourav Poddar To: , , , Subject: [PATCHv2 04/10] spi/qspi: configure set up register for memory map. Date: Fri, 6 Dec 2013 19:54:45 +0530 Message-ID: <1386339891-32717-5-git-send-email-sourav.poddar@ti.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1386339891-32717-1-git-send-email-sourav.poddar@ti.com> References: <1386339891-32717-1-git-send-email-sourav.poddar@ti.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20131206_092547_426523_A00D2A65 X-CRM114-Status: GOOD ( 11.29 ) X-Spam-Score: -7.1 (-------) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-7.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/, high trust [198.47.26.153 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: devicetree@vger.kernel.org, balbi@ti.com, linux-mtd@lists.infradead.org, bcousson@baylibre.com, Sourav Poddar , linux-omap@vger.kernel.org, dwmw2@infradead.org X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org These add api to configure set up registers which will be used for memory mapped operations. These was provided as a pointer in the earlier patch and can be used by the slave devices to configure the master controller as an when required according to the usecases. Signed-off-by: Sourav Poddar --- drivers/spi/spi-ti-qspi.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 48294d1..e4a8afc 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c @@ -117,6 +117,10 @@ struct ti_qspi { #define MEM_CS (1 << 8) #define MEM_CS_DIS (0 << 8) +#define QSPI_SETUP0_RD_NORMAL (0x0 << 12) +#define QSPI_SETUP0_RD_DUAL (0x1 << 12) +#define QSPI_SETUP0_RD_QUAD (0x3 << 12) + #define QSPI_FRAME 4096 #define QSPI_AUTOSUSPEND_TIMEOUT 2000 @@ -220,6 +224,30 @@ static int ti_qspi_setup(struct spi_device *spi) return 0; } +static void ti_qspi_configure_from_slave(struct spi_device *spi) +{ + struct ti_qspi *qspi = spi_master_get_devdata(spi->master); + struct slave_info info = spi->info; + u32 memval, mode; + + mode = spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD); + memval = (info.read_opcode << 0) | (info.program_opcode << 16) | + ((info.addr_width - 1) << 8) | (info.dummy_cycles << 10); + + switch (mode) { + case SPI_RX_DUAL: + memval |= QSPI_SETUP0_RD_DUAL; + break; + case SPI_RX_QUAD: + memval |= QSPI_SETUP0_RD_QUAD; + break; + default: + memval |= QSPI_SETUP0_RD_NORMAL; + break; + } + ti_qspi_write(qspi, memval, QSPI_SPI_SETUP0_REG); +} + static void ti_qspi_restore_ctx(struct ti_qspi *qspi) { struct ti_qspi_regs *ctx_reg = &qspi->ctx_reg; @@ -488,6 +516,7 @@ static int ti_qspi_probe(struct platform_device *pdev) master->dev.of_node = pdev->dev.of_node; master->bits_per_word_mask = BIT(32 - 1) | BIT(16 - 1) | BIT(8 - 1); master->mmap = true; + master->configure_from_slave = ti_qspi_configure_from_slave; if (!of_property_read_u32(np, "num-cs", &num_cs)) master->num_chipselect = num_cs;