From patchwork Thu Feb 2 12:06:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Artem Bityutskiy X-Patchwork-Id: 139124 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from merlin.infradead.org (unknown [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 71EE2104785 for ; Thu, 2 Feb 2012 23:05:18 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1RsvOk-0007HQ-Q7; Thu, 02 Feb 2012 12:04:18 +0000 Received: from mail-iy0-f177.google.com ([209.85.210.177]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1RsvOh-0007HC-HH for linux-mtd@lists.infradead.org; Thu, 02 Feb 2012 12:04:16 +0000 Received: by iafj26 with SMTP id j26so3675293iaf.36 for ; Thu, 02 Feb 2012 04:04:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=message-id:subject:from:reply-to:to:cc:date:in-reply-to:references :content-type:x-mailer:mime-version; bh=ghGfdWJed24xN/zATf5llwIdwZYC/wbM+IdewsMtCN4=; b=RLqmM5kHqCmZ1Q1gsfZ1MxcSxvQG3OhdhlrIdN/+11IDfy1VQI+25Z6D9gCWLFdH7v qeFlNNrjnMO3CIbMWy3kSk69ChIroQSKICK4p5GZ9+7EF522hea6FUR4ty3fD4/q6Jg3 8oYAWh619iJBRmLSTsa6xG7omBz8PTXXyyTyI= Received: by 10.43.48.132 with SMTP id uw4mr2320360icb.17.1328184253206; Thu, 02 Feb 2012 04:04:13 -0800 (PST) Received: from [127.0.0.1] (jfdmzpr03-ext.jf.intel.com. [134.134.139.72]) by mx.google.com with ESMTPS id lu10sm3602207igc.0.2012.02.02.04.04.08 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 02 Feb 2012 04:04:11 -0800 (PST) Message-ID: <1328184370.28171.175.camel@sauron.fi.intel.com> Subject: Re: [PATCH] mtd: atmel_nand: fix access to 16 bit NAND devices From: Artem Bityutskiy To: Nicolas Ferre , "Voss, Nikolaus" , Eric =?ISO-8859-1?Q?B=E9nard?= Date: Thu, 02 Feb 2012 14:06:10 +0200 In-Reply-To: <4F265B7E.6060806@atmel.com> References: <201201251217.q0PCHmRe027024@gatekeeper.vosshq.de> <1327670996.26648.43.camel@sauron.fi.intel.com> <4F265B7E.6060806@atmel.com> X-Mailer: Evolution 3.2.3 (3.2.3-1.fc16) Mime-Version: 1.0 X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (dedekind1[at]gmail.com) -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.210.177 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (dedekind1[at]gmail.com) -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: "'linux-mtd@lists.infradead.org'" , "'linux-kernel@vger.kernel.org'" X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list Reply-To: dedekind1@gmail.com List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-mtd-bounces@lists.infradead.org Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org On Mon, 2012-01-30 at 09:57 +0100, Nicolas Ferre wrote: > Artem, do you want me to prepare a patch for reverting initial commit or > you just need my "Acked-by" (feel free to add though)? OK, thanks, just pushed this patch to l2-mtd.git and add Cc to -stable, please, validate. I'll ask David to merge it to 3.3, but no guarantees - you should ping him directly if you want this to happen. URL: http://git.infradead.org/users/dedekind/l2-mtd.git/commit/21c7726c98628016c868d803a2a8e6f2d5702519 From: Artem Bityutskiy Date: Thu, 2 Feb 2012 13:54:25 +0200 Subject: [PATCH] Revert "mtd: atmel_nand: optimize read/write buffer functions" This reverts commit fb5427508abbd635e877fabdf55795488119c2d6. The reason is that it breaks 16 bits NAND flash as it was reported by Nikolaus Voss and confirmed by Eric BĂ©nard. Nicolas Ferre alco confirmed: "After double checking with designers, I must admit that I misunderstood the way of optimizing accesses to SMC. 16 bit nand is not so common those days..." Reported-by: Nikolaus Voss Acked-by: Nicolas Ferre Signed-off-by: Artem Bityutskiy Cc: stable@kernel.org [3.1+] --- drivers/mtd/nand/atmel_nand.c | 45 +++++++++++++++++++++++++++++++++++++--- 1 files changed, 41 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 4dd056e..35b4fb5 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -161,6 +161,37 @@ static int atmel_nand_device_ready(struct mtd_info *mtd) !!host->board->rdy_pin_active_low; } +/* + * Minimal-overhead PIO for data access. + */ +static void atmel_read_buf8(struct mtd_info *mtd, u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_readsb(nand_chip->IO_ADDR_R, buf, len); +} + +static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_readsw(nand_chip->IO_ADDR_R, buf, len / 2); +} + +static void atmel_write_buf8(struct mtd_info *mtd, const u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_writesb(nand_chip->IO_ADDR_W, buf, len); +} + +static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len) +{ + struct nand_chip *nand_chip = mtd->priv; + + __raw_writesw(nand_chip->IO_ADDR_W, buf, len / 2); +} + static void dma_complete_func(void *completion) { complete(completion); @@ -235,27 +266,33 @@ err_buf: static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len) { struct nand_chip *chip = mtd->priv; + struct atmel_nand_host *host = chip->priv; if (use_dma && len > mtd->oobsize) /* only use DMA for bigger than oob size: better performances */ if (atmel_nand_dma_op(mtd, buf, len, 1) == 0) return; - /* if no DMA operation possible, use PIO */ - memcpy_fromio(buf, chip->IO_ADDR_R, len); + if (host->board->bus_width_16) + atmel_read_buf16(mtd, buf, len); + else + atmel_read_buf8(mtd, buf, len); } static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) { struct nand_chip *chip = mtd->priv; + struct atmel_nand_host *host = chip->priv; if (use_dma && len > mtd->oobsize) /* only use DMA for bigger than oob size: better performances */ if (atmel_nand_dma_op(mtd, (void *)buf, len, 0) == 0) return; - /* if no DMA operation possible, use PIO */ - memcpy_toio(chip->IO_ADDR_W, buf, len); + if (host->board->bus_width_16) + atmel_write_buf16(mtd, buf, len); + else + atmel_write_buf8(mtd, buf, len); } /*