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[0/4] spi: add support for octal mode data transfer

Message ID 1538642920-3843-1-git-send-email-yogeshnarayan.gaur@nxp.com
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Series spi: add support for octal mode data transfer | expand

Message

Yogesh Narayan Gaur Oct. 4, 2018, 8:48 a.m. UTC 
Add support for octal mode IO data transfer.
Micron flash, mt35xu512aba, supports octal mode data transfer and
NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).

Patch series 
* Add support for octal mode flags and parsing of same in spi driver.
* Add octal data communication commands required for mt35xu512aba [1] flash.
* Add support for Read and Write proto for (1-1-8/1-8-8) mode.
* Add mode bit required for octal mode in nxp-fspi driver [2].
* Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].

Tested on LX2160ARDB target with nxp-fspi driver, below are
Read performance number of 1-1-1 and 1-1-8 read protocol.

 root@lxxx:~# cat /proc/mtd
 dev:    size   erasesize  name
 mtd0: 04000000 00001000 "spi0.0"
 mtd1: 04000000 00001000 "spi0.1"
 root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
 Copied 16777216 bytes from address 0x00000000 in flash to 0read
 
 real    0m2.792s
 user    0m0.000s
 sys     0m2.790s
 root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
 Copied 16777216 bytes from address 0x00000000 in flash to 0read
 
 real    0m0.441s
 user    0m0.000s
 sys     0m0.440s
 root@ls1012ardb:~#

 Flash device MTD0 configured in 1-1-1 protocol.
 Flash device MTD1 configured in 1-1-8 protocol.

[1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66317
[2] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66887

Yogesh Gaur (4):
  spi: add support for octal I/O data transfer
  mtd: spi-nor: add support for octal mode data transfer
  spi: nxp-fspi: add mode flag bit for octal support
  arm64: dts: lx2160a: update fspi node

 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |  4 ++++
 drivers/mtd/devices/m25p80.c                      |  9 ++++++++-
 drivers/mtd/spi-nor/spi-nor.c                     | 14 +++++++++++++-
 drivers/spi/spi-nxp-fspi.c                        |  4 ++--
 drivers/spi/spi.c                                 |  6 ++++++
 include/linux/mtd/spi-nor.h                       |  8 ++++++++
 include/linux/spi/spi.h                           |  2 ++
 7 files changed, 43 insertions(+), 4 deletions(-)

Comments

Boris Brezillon Oct. 4, 2018, 9:18 a.m. UTC | #1 
On Thu,  4 Oct 2018 14:18:40 +0530
Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> Flash mt35xu512aba connected to FlexSPI controller supports
> 1-1-8 protocol.
> Added flag spi-rx-bus-width and spi-tx-bus-width with values as
> 8 and 1 respectively for both flashes connected at CS0 and CS1.
> 
> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 901ca346..817175a 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -42,6 +42,8 @@
>  		m25p,fast-read;
>  		spi-max-frequency = <20000000>;
>  		reg = <0>;
> +		spi-rx-bus-width = <8>;
> +		spi-tx-bus-width = <1>;

Why 1? The flash is already flagged with SPI_NOR_OCTAL_READ, which
means only the read path will use 1-1-8 mode, so you can safely set
spi-tx-bus-width here and let the framework choose the appropriate mode
based on the flash capabilities.

>  	};
>  
>  	mt35xu512aba1: flash@1 {
> @@ -51,6 +53,8 @@
>  		m25p,fast-read;
>  		spi-max-frequency = <20000000>;
>  		reg = <1>;
> +		spi-rx-bus-width = <8>;
> +		spi-tx-bus-width = <1>;
>  	};
>  };
>
Raghavendra, Vignesh Oct. 4, 2018, 9:22 a.m. UTC | #2 
Hi Yogesh,

On Thursday 04 October 2018 02:18 PM, Yogesh Gaur wrote:
> Add support for octal mode IO data transfer.
> Micron flash, mt35xu512aba, supports octal mode data transfer and
> NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
> 
> Patch series 
> * Add support for octal mode flags and parsing of same in spi driver.
> * Add octal data communication commands required for mt35xu512aba [1] flash.
> * Add support for Read and Write proto for (1-1-8/1-8-8) mode.
> * Add mode bit required for octal mode in nxp-fspi driver [2].
> * Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].
> 
> Tested on LX2160ARDB target with nxp-fspi driver, below are
> Read performance number of 1-1-1 and 1-1-8 read protocol.
> 
>  root@lxxx:~# cat /proc/mtd
>  dev:    size   erasesize  name
>  mtd0: 04000000 00001000 "spi0.0"
>  mtd1: 04000000 00001000 "spi0.1"
>  root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
>  Copied 16777216 bytes from address 0x00000000 in flash to 0read
>  
>  real    0m2.792s
>  user    0m0.000s
>  sys     0m2.790s
>  root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
>  Copied 16777216 bytes from address 0x00000000 in flash to 0read
>  
>  real    0m0.441s
>  user    0m0.000s
>  sys     0m0.440s
>  root@ls1012ardb:~#
> 
>  Flash device MTD0 configured in 1-1-1 protocol.
>  Flash device MTD1 configured in 1-1-8 protocol.
> 
> [1] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66317
> [2] https://patchwork.ozlabs.org/project/linux-mtd/list/?series=66887
> 
> Yogesh Gaur (4):
>   spi: add support for octal I/O data transfer
>   mtd: spi-nor: add support for octal mode data transfer
>   spi: nxp-fspi: add mode flag bit for octal support
>   arm64: dts: lx2160a: update fspi node

This is a bit confusing and difficult to follow. I suggest to order
patches such that spi-nor layer changes are at the first, then m25p80
related things, followed by spi-mem (if needed spi) changes and finally
spi-mem controller driver changes.
Yogesh Narayan Gaur Oct. 4, 2018, 9:24 a.m. UTC | #3 
Hi Boris,

> -----Original Message-----
> From: Boris Brezillon [mailto:boris.brezillon@bootlin.com]
> Sent: Thursday, October 4, 2018 2:48 PM
> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> Cc: linux-mtd@lists.infradead.org; marek.vasut@gmail.com; vigneshr@ti.com;
> linux-spi@vger.kernel.org; devicetree@vger.kernel.org; robh@kernel.org;
> mark.rutland@arm.com; shawnguo@kernel.org; linux-arm-
> kernel@lists.infradead.org; computersforpeace@gmail.com;
> frieder.schrempf@exceet.de; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 4/4] arm64: dts: lx2160a: update fspi node
> 
> On Thu,  4 Oct 2018 14:18:40 +0530
> Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:
> 
> > Flash mt35xu512aba connected to FlexSPI controller supports
> > 1-1-8 protocol.
> > Added flag spi-rx-bus-width and spi-tx-bus-width with values as
> > 8 and 1 respectively for both flashes connected at CS0 and CS1.
> >
> > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > index 901ca346..817175a 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > @@ -42,6 +42,8 @@
> >  		m25p,fast-read;
> >  		spi-max-frequency = <20000000>;
> >  		reg = <0>;
> > +		spi-rx-bus-width = <8>;
> > +		spi-tx-bus-width = <1>;
> 
> Why 1? The flash is already flagged with SPI_NOR_OCTAL_READ, which means
> only the read path will use 1-1-8 mode, so you can safely set spi-tx-bus-width
> here and let the framework choose the appropriate mode based on the flash
> capabilities.

Ok.

> 
> >  	};
> >
> >  	mt35xu512aba1: flash@1 {
> > @@ -51,6 +53,8 @@
> >  		m25p,fast-read;
> >  		spi-max-frequency = <20000000>;
> >  		reg = <1>;
> > +		spi-rx-bus-width = <8>;
> > +		spi-tx-bus-width = <1>;
> >  	};
> >  };
> >
Boris Brezillon Oct. 4, 2018, 9:26 a.m. UTC | #4 
On Thu, 4 Oct 2018 09:24:57 +0000
Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> wrote:

> Hi Boris,
> 
> > -----Original Message-----
> > From: Boris Brezillon [mailto:boris.brezillon@bootlin.com]
> > Sent: Thursday, October 4, 2018 2:48 PM
> > To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> > Cc: linux-mtd@lists.infradead.org; marek.vasut@gmail.com; vigneshr@ti.com;
> > linux-spi@vger.kernel.org; devicetree@vger.kernel.org; robh@kernel.org;
> > mark.rutland@arm.com; shawnguo@kernel.org; linux-arm-
> > kernel@lists.infradead.org; computersforpeace@gmail.com;
> > frieder.schrempf@exceet.de; linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH 4/4] arm64: dts: lx2160a: update fspi node
> > 
> > On Thu,  4 Oct 2018 14:18:40 +0530
> > Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:
> >   
> > > Flash mt35xu512aba connected to FlexSPI controller supports
> > > 1-1-8 protocol.
> > > Added flag spi-rx-bus-width and spi-tx-bus-width with values as
> > > 8 and 1 respectively for both flashes connected at CS0 and CS1.
> > >
> > > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> > > ---
> > >  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
> > >  1 file changed, 4 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > index 901ca346..817175a 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > @@ -42,6 +42,8 @@
> > >  		m25p,fast-read;
> > >  		spi-max-frequency = <20000000>;
> > >  		reg = <0>;
> > > +		spi-rx-bus-width = <8>;
> > > +		spi-tx-bus-width = <1>;  
> > 
> > Why 1? The flash is already flagged with SPI_NOR_OCTAL_READ, which means
> > only the read path will use 1-1-8 mode, so you can safely set spi-tx-bus-width

I meant 'set spi-tx-bus-width to 8' here

> > here and let the framework choose the appropriate mode based on the flash
> > capabilities.  
> 
> Ok.
> 
> >   
> > >  	};
> > >
> > >  	mt35xu512aba1: flash@1 {
> > > @@ -51,6 +53,8 @@
> > >  		m25p,fast-read;
> > >  		spi-max-frequency = <20000000>;
> > >  		reg = <1>;
> > > +		spi-rx-bus-width = <8>;
> > > +		spi-tx-bus-width = <1>;
> > >  	};
> > >  };
> > >  
>
Yogesh Narayan Gaur Oct. 4, 2018, 9:27 a.m. UTC | #5 
> -----Original Message-----
> From: Boris Brezillon [mailto:boris.brezillon@bootlin.com]
> Sent: Thursday, October 4, 2018 2:56 PM
> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> Cc: linux-mtd@lists.infradead.org; marek.vasut@gmail.com; vigneshr@ti.com;
> linux-spi@vger.kernel.org; devicetree@vger.kernel.org; robh@kernel.org;
> mark.rutland@arm.com; shawnguo@kernel.org; linux-arm-
> kernel@lists.infradead.org; computersforpeace@gmail.com;
> frieder.schrempf@exceet.de; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 4/4] arm64: dts: lx2160a: update fspi node
> 
> On Thu, 4 Oct 2018 09:24:57 +0000
> Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com> wrote:
> 
> > Hi Boris,
> >
> > > -----Original Message-----
> > > From: Boris Brezillon [mailto:boris.brezillon@bootlin.com]
> > > Sent: Thursday, October 4, 2018 2:48 PM
> > > To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> > > Cc: linux-mtd@lists.infradead.org; marek.vasut@gmail.com;
> > > vigneshr@ti.com; linux-spi@vger.kernel.org;
> > > devicetree@vger.kernel.org; robh@kernel.org; mark.rutland@arm.com;
> > > shawnguo@kernel.org; linux-arm- kernel@lists.infradead.org;
> > > computersforpeace@gmail.com; frieder.schrempf@exceet.de;
> > > linux-kernel@vger.kernel.org
> > > Subject: Re: [PATCH 4/4] arm64: dts: lx2160a: update fspi node
> > >
> > > On Thu,  4 Oct 2018 14:18:40 +0530
> > > Yogesh Gaur <yogeshnarayan.gaur@nxp.com> wrote:
> > >
> > > > Flash mt35xu512aba connected to FlexSPI controller supports
> > > > 1-1-8 protocol.
> > > > Added flag spi-rx-bus-width and spi-tx-bus-width with values as
> > > > 8 and 1 respectively for both flashes connected at CS0 and CS1.
> > > >
> > > > Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
> > > > ---
> > > >  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 4 ++++
> > > >  1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > > b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > > index 901ca346..817175a 100644
> > > > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> > > > @@ -42,6 +42,8 @@
> > > >  		m25p,fast-read;
> > > >  		spi-max-frequency = <20000000>;
> > > >  		reg = <0>;
> > > > +		spi-rx-bus-width = <8>;
> > > > +		spi-tx-bus-width = <1>;
> > >
> > > Why 1? The flash is already flagged with SPI_NOR_OCTAL_READ, which
> > > means only the read path will use 1-1-8 mode, so you can safely set
> > > spi-tx-bus-width
> 
> I meant 'set spi-tx-bus-width to 8' here

Yes.

> 
> > > here and let the framework choose the appropriate mode based on the
> > > flash capabilities.
> >
> > Ok.
> >
> > >
> > > >  	};
> > > >
> > > >  	mt35xu512aba1: flash@1 {
> > > > @@ -51,6 +53,8 @@
> > > >  		m25p,fast-read;
> > > >  		spi-max-frequency = <20000000>;
> > > >  		reg = <1>;
> > > > +		spi-rx-bus-width = <8>;
> > > > +		spi-tx-bus-width = <1>;
> > > >  	};
> > > >  };
> > > >
> >
Yogesh Narayan Gaur Oct. 4, 2018, 9:28 a.m. UTC | #6 
Hi Vignesh,

> -----Original Message-----
> From: Vignesh R [mailto:vigneshr@ti.com]
> Sent: Thursday, October 4, 2018 2:52 PM
> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>; linux-
> mtd@lists.infradead.org; boris.brezillon@bootlin.com; marek.vasut@gmail.com;
> linux-spi@vger.kernel.org; devicetree@vger.kernel.org
> Cc: robh@kernel.org; mark.rutland@arm.com; shawnguo@kernel.org; linux-
> arm-kernel@lists.infradead.org; computersforpeace@gmail.com;
> frieder.schrempf@exceet.de; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 0/4] spi: add support for octal mode data transfer
> 
> Hi Yogesh,
> 
> On Thursday 04 October 2018 02:18 PM, Yogesh Gaur wrote:
> > Add support for octal mode IO data transfer.
> > Micron flash, mt35xu512aba, supports octal mode data transfer and NXP
> > FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
> >
> > Patch series
> > * Add support for octal mode flags and parsing of same in spi driver.
> > * Add octal data communication commands required for mt35xu512aba [1]
> flash.
> > * Add support for Read and Write proto for (1-1-8/1-8-8) mode.
> > * Add mode bit required for octal mode in nxp-fspi driver [2].
> > * Define binding property 'spi-rx/tx-bus-width' for LX2160ARDB target [2].
> >
> > Tested on LX2160ARDB target with nxp-fspi driver, below are Read
> > performance number of 1-1-1 and 1-1-8 read protocol.
> >
> >  root@lxxx:~# cat /proc/mtd
> >  dev:    size   erasesize  name
> >  mtd0: 04000000 00001000 "spi0.0"
> >  mtd1: 04000000 00001000 "spi0.1"
> >  root@lxxx:~# time mtd_debug read /dev/mtd0 0x0 0x1000000 0read
> > Copied 16777216 bytes from address 0x00000000 in flash to 0read
> >
> >  real    0m2.792s
> >  user    0m0.000s
> >  sys     0m2.790s
> >  root@lxxx:~# time mtd_debug read /dev/mtd1 0x0 0x1000000 0read
> > Copied 16777216 bytes from address 0x00000000 in flash to 0read
> >
> >  real    0m0.441s
> >  user    0m0.000s
> >  sys     0m0.440s
> >  root@ls1012ardb:~#
> >
> >  Flash device MTD0 configured in 1-1-1 protocol.
> >  Flash device MTD1 configured in 1-1-8 protocol.
> >
> > [1]
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> > chwork.ozlabs.org%2Fproject%2Flinux-
> mtd%2Flist%2F%3Fseries%3D66317&amp
> > ;data=02%7C01%7Cyogeshnarayan.gaur%40nxp.com%7C7aae8ba71d80420d4
> 49f08d
> >
> 629dad44d%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636742417
> 189300
> >
> 574&amp;sdata=xsSpmoRzDKJ9Z6O56kTG5pHPojjmUfSz9rB5cWQlPEM%3D&am
> p;reser
> > ved=0 [2]
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat
> > chwork.ozlabs.org%2Fproject%2Flinux-
> mtd%2Flist%2F%3Fseries%3D66887&amp
> > ;data=02%7C01%7Cyogeshnarayan.gaur%40nxp.com%7C7aae8ba71d80420d4
> 49f08d
> >
> 629dad44d%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636742417
> 189300
> >
> 574&amp;sdata=oFsfTtpt0GDi3y0Fi%2B%2F9SFp8ZvbwPPe5qMNFIwVw7wE%3D
> &amp;r
> > eserved=0
> >
> > Yogesh Gaur (4):
> >   spi: add support for octal I/O data transfer
> >   mtd: spi-nor: add support for octal mode data transfer
> >   spi: nxp-fspi: add mode flag bit for octal support
> >   arm64: dts: lx2160a: update fspi node
> 
> This is a bit confusing and difficult to follow. I suggest to order patches such that
> spi-nor layer changes are at the first, then m25p80 related things, followed by
> spi-mem (if needed spi) changes and finally spi-mem controller driver changes.
> 

Thanks for the comment.
Would change the patch order as suggested and break the functionality in small patches as suggested by Boris.

--
Regards
Yogesh Gaur

> --
> Regards
> Vignesh