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[GIT,PULL] qcom SoC changes for v4.1

Message ID alpine.DEB.2.02.1503161601450.30317@galak-ubuntu.qualcomm.com
State New
Headers show

Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git tags/qcom-soc-for-4.1

Message

Kumar Gala March 16, 2015, 9:03 p.m. UTC
The following changes since commit c517d838eb7d07bbe9507871fab3931deccff539:

   Linux 4.0-rc1 (2015-02-22 18:21:14 -0800)

are available in the git repository at:

   git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git tags/qcom-soc-for-4.1

for you to fetch changes up to e5fdad68d47ed344832b7ca4e18b2e9708d8141e:

   soc: qcom: gsbi: Add support for ADM CRCI muxing (2015-03-11 15:18:39 -0500)

----------------------------------------------------------------
Qualcomm ARM Based SoC Updates for v4.1

* Merged the based Qualcomm SCM and SCM boot support
* Cleaned up SCM interface to only expose functional SCM APIs
* Moved Qualcomm SCM code into drivers/firmware
* Updated the SCM APIs for setting cpu cold and warm boot addresses
* Added support for ADM CRCI muxing

----------------------------------------------------------------
Andy Gross (1):
       soc: qcom: gsbi: Add support for ADM CRCI muxing

Kumar Gala (4):
       ARM: qcom: Merge scm and scm boot code together
       ARM: qcom: Cleanup scm interface to only export what is needed
       ARM: qcom: Prep scm code for move to drivers/firmware
       firmware: qcom: scm: Move the scm driver to drivers/firmware

Lina Iyer (3):
       firmware: qcom: scm: Clean cold boot entry to export only the API
       firmware: qcom: scm: Add qcom_scm_set_warm_boot_addr function
       firmware: qcom: scm: Support cpu power down through SCM

  .../devicetree/bindings/soc/qcom/qcom,gsbi.txt     |  30 +-
  MAINTAINERS                                        |   1 +
  arch/arm/Kconfig                                   |   2 +
  arch/arm/mach-qcom/Kconfig                         |   3 -
  arch/arm/mach-qcom/Makefile                        |   3 -
  arch/arm/mach-qcom/platsmp.c                       |  23 +-
  arch/arm/mach-qcom/scm-boot.c                      |  39 --
  arch/arm/mach-qcom/scm-boot.h                      |  26 --
  arch/arm/mach-qcom/scm.c                           | 326 --------------
  arch/arm/mach-qcom/scm.h                           |  25 --
  drivers/firmware/Kconfig                           |   4 +
  drivers/firmware/Makefile                          |   2 +
  drivers/firmware/qcom_scm.c                        | 494 +++++++++++++++++++++
  drivers/soc/qcom/Kconfig                           |   1 +
  drivers/soc/qcom/qcom_gsbi.c                       | 152 +++++++
  include/linux/qcom_scm.h                           |  28 ++
  16 files changed, 708 insertions(+), 451 deletions(-)
  delete mode 100644 arch/arm/mach-qcom/scm-boot.c
  delete mode 100644 arch/arm/mach-qcom/scm-boot.h
  delete mode 100644 arch/arm/mach-qcom/scm.c
  delete mode 100644 arch/arm/mach-qcom/scm.h
  create mode 100644 drivers/firmware/qcom_scm.c
  create mode 100644 include/linux/qcom_scm.h

--
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Comments

Olof Johansson April 2, 2015, 12:36 a.m. UTC | #1
On Mon, Mar 16, 2015 at 04:03:12PM -0500, Kumar Gala wrote:
> The following changes since commit c517d838eb7d07bbe9507871fab3931deccff539:
> 
>   Linux 4.0-rc1 (2015-02-22 18:21:14 -0800)
> 
> are available in the git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git tags/qcom-soc-for-4.1
> 
> for you to fetch changes up to e5fdad68d47ed344832b7ca4e18b2e9708d8141e:
> 
>   soc: qcom: gsbi: Add support for ADM CRCI muxing (2015-03-11 15:18:39 -0500)

Thanks. Merged into next/drivers.


-Olof
Nicolas Dechesne April 2, 2015, 8:37 a.m. UTC | #2
Andy, Kumar,

On Mon, Mar 16, 2015 at 10:03 PM, Kumar Gala <galak@codeaurora.org> wrote:
> Andy Gross (1):
>       soc: qcom: gsbi: Add support for ADM CRCI muxing

this commit seems to break the boot on IFC6410, it was initially
reported on kernelci.org, see report and bootlog [1].

running git bisect led me to:

e5fdad68d47ed344832b7ca4e18b2e9708d8141e is the first bad commit
commit e5fdad68d47ed344832b7ca4e18b2e9708d8141e
Author: Andy Gross <agross@codeaurora.org>
Date:   Mon Feb 9 16:01:06 2015 -0600

    soc: qcom: gsbi: Add support for ADM CRCI muxing

    This patch adds automatic configuration for the ADM CRCI muxing required to
    support DMA operations for GSBI clients.  The GSBI mode and
instance determine
    the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
    works properly.

    Signed-off-by: Andy Gross <agross@codeaurora.org>
    Signed-off-by: Kumar Gala <galak@codeaurora.org>


[1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
Kumar Gala April 2, 2015, 7:25 p.m. UTC | #3
On Apr 2, 2015, at 3:37 AM, Nicolas Dechesne <nicolas.dechesne@linaro.org> wrote:

> Andy, Kumar,
> 
> On Mon, Mar 16, 2015 at 10:03 PM, Kumar Gala <galak@codeaurora.org> wrote:
>> Andy Gross (1):
>>      soc: qcom: gsbi: Add support for ADM CRCI muxing
> 
> this commit seems to break the boot on IFC6410, it was initially
> reported on kernelci.org, see report and bootlog [1].
> 
> running git bisect led me to:
> 
> e5fdad68d47ed344832b7ca4e18b2e9708d8141e is the first bad commit
> commit e5fdad68d47ed344832b7ca4e18b2e9708d8141e
> Author: Andy Gross <agross@codeaurora.org>
> Date:   Mon Feb 9 16:01:06 2015 -0600
> 
>    soc: qcom: gsbi: Add support for ADM CRCI muxing
> 
>    This patch adds automatic configuration for the ADM CRCI muxing required to
>    support DMA operations for GSBI clients.  The GSBI mode and
> instance determine
>    the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
>    works properly.
> 
>    Signed-off-by: Andy Gross <agross@codeaurora.org>
>    Signed-off-by: Kumar Gala <galak@codeaurora.org>
> 
> 
> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/

I think we need to associated DT updates.

- k
Nicolas Dechesne April 2, 2015, 7:47 p.m. UTC | #4
On Thu, Apr 2, 2015 at 9:43 PM, Stephen Boyd <sboyd@codeaurora.org> wrote:
> What about this patch squashed on top? Just guessing but I suspect we
> don't care about cell-index if we're not doing the tcsr stuff. Also, I
> imagine we could get rid of cell-index entirely if we matched against
> the address of the gsbi instead.
>
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
>
> ----8<-----
>
> diff --git a/drivers/soc/qcom/qcom_gsbi.c b/drivers/soc/qcom/qcom_gsbi.c
> index 09c669e70d63..ac7d71b6527d 100644
> --- a/drivers/soc/qcom/qcom_gsbi.c
> +++ b/drivers/soc/qcom/qcom_gsbi.c
> @@ -139,7 +139,7 @@ static int gsbi_probe(struct platform_device *pdev)
>         void __iomem *base;
>         struct gsbi_info *gsbi;
>         int i;
> -       u32 mask, gsbi_num;
> +       u32 mask, gsbi_num = 0;
>         const struct crci_config *config = NULL;
>
>         gsbi = devm_kzalloc(&pdev->dev, sizeof(*gsbi), GFP_KERNEL);
> @@ -166,16 +166,19 @@ static int gsbi_probe(struct platform_device *pdev)
>
>                         of_node_put(tcsr_node);
>                 }
> -       }
>
> -       if (of_property_read_u32(node, "cell-index", &gsbi_num)) {
> -               dev_err(&pdev->dev, "missing cell-index\n");
> -               return -EINVAL;
> -       }
> +               if (config) {
> +                       if (of_property_read_u32(node, "cell-index", &gsbi_num)) {
> +                               dev_err(&pdev->dev, "missing cell-index\n");
> +                               return -EINVAL;
> +                       }
> +
> +                       if (gsbi_num < 1 || gsbi_num > MAX_GSBI) {
> +                               dev_err(&pdev->dev, "invalid cell-index\n");
> +                               return -EINVAL;
> +                       }
> +               }
>
> -       if (gsbi_num < 1 || gsbi_num > MAX_GSBI) {
> -               dev_err(&pdev->dev, "invalid cell-index\n");
> -               return -EINVAL;
>         }
>
>         if (of_property_read_u32(node, "qcom,mode", &gsbi->mode)) {


I think it would work, i cannot test right now, i can do it tomorrow
if you need it, but that's pretty much how i tested earlier today (i
had commented out the 2 statements you are putting moving here in the
new if statement.

I did also test with the associated DT patches, and it worked as well.
Andy Gross April 3, 2015, 4:22 p.m. UTC | #5
On Thu, Apr 02, 2015 at 12:43:50PM -0700, Stephen Boyd wrote:
> On 04/02/15 12:25, Kumar Gala wrote:
> > On Apr 2, 2015, at 3:37 AM, Nicolas Dechesne <nicolas.dechesne@linaro.org> wrote:
> >
> >> Andy, Kumar,
> >>
> >> On Mon, Mar 16, 2015 at 10:03 PM, Kumar Gala <galak@codeaurora.org> wrote:
> >>> Andy Gross (1):
> >>>      soc: qcom: gsbi: Add support for ADM CRCI muxing
> >> this commit seems to break the boot on IFC6410, it was initially
> >> reported on kernelci.org, see report and bootlog [1].
> >>
> >> running git bisect led me to:
> >>
> >> e5fdad68d47ed344832b7ca4e18b2e9708d8141e is the first bad commit
> >> commit e5fdad68d47ed344832b7ca4e18b2e9708d8141e
> >> Author: Andy Gross <agross@codeaurora.org>
> >> Date:   Mon Feb 9 16:01:06 2015 -0600
> >>
> >>    soc: qcom: gsbi: Add support for ADM CRCI muxing
> >>
> >>    This patch adds automatic configuration for the ADM CRCI muxing required to
> >>    support DMA operations for GSBI clients.  The GSBI mode and
> >> instance determine
> >>    the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
> >>    works properly.
> >>
> >>    Signed-off-by: Andy Gross <agross@codeaurora.org>
> >>    Signed-off-by: Kumar Gala <galak@codeaurora.org>
> >>
> >>
> >> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
> > I think we need to associated DT updates.
> >
> >
> 
> What about this patch squashed on top? Just guessing but I suspect we
> don't care about cell-index if we're not doing the tcsr stuff. Also, I
> imagine we could get rid of cell-index entirely if we matched against
> the address of the gsbi instead.

Except that the GSBI5 base address changes from chip to chip.
Stephen Boyd April 3, 2015, 6:40 p.m. UTC | #6
On 04/03, Andy Gross wrote:
> On Thu, Apr 02, 2015 at 12:43:50PM -0700, Stephen Boyd wrote:
> > On 04/02/15 12:25, Kumar Gala wrote:
> > >> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
> > > I think we need to associated DT updates.
> > >
> > >
> > 
> > What about this patch squashed on top? Just guessing but I suspect we
> > don't care about cell-index if we're not doing the tcsr stuff. Also, I
> > imagine we could get rid of cell-index entirely if we matched against
> > the address of the gsbi instead.
> 
> Except that the GSBI5 base address changes from chip to chip.
> 
> 

Yep, for the cell-index removal part I was thinking we would make
another table per SoC like we already have for the TCSR part. The
table would map the physical address to the GSBI number.