From patchwork Mon May 16 17:28:15 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 95787 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 09DDEB6EEE for ; Tue, 17 May 2011 03:28:34 +1000 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by bombadil.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QM1an-0005No-QY; Mon, 16 May 2011 17:28:30 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QM1am-0008WA-H4; Mon, 16 May 2011 17:28:28 +0000 Received: from caramon.arm.linux.org.uk ([78.32.30.218]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QM1ah-0008Vs-Gq for linux-arm-kernel@lists.infradead.org; Mon, 16 May 2011 17:28:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:Content-Type:MIME-Version:Subject:Cc:To:From:References:In-Reply-To:Message-Id:Date; bh=iTL/vKJ6Q/1Qp2plbpwDgXVPh1YH3c6c+50MGa160oA=; b=lgxv7U94HUNXVKFogBk2yojhVaNmFK7/w3+TBrPjqa9r1xO3d5h9Jg+Zi28Ct03iQ/BcN0aZycGRWJ+EGXZpchLDXCkZAXoiTEWbcAuYSCI7GrZwTCSmsyH0xOP1QmP+xZVV1+/Jnmk2/YX12zdtuxB1zEjvRn7xEgwPA/dY7oM=; Received: from e0022681537dd.dyn.arm.linux.org.uk ([2002:4e20:1eda:1:222:68ff:fe15:37dd] helo=rmk-PC.arm.linux.org.uk) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1QM1ab-0002kJ-GT; Mon, 16 May 2011 18:28:18 +0100 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.72) (envelope-from ) id 1QM1aZ-0003Dl-8c; Mon, 16 May 2011 18:28:15 +0100 Date: Mon, 16 May 2011 18:28:15 +0100 Message-Id: In-Reply-To: <20110516172334.GD13659@n2100.arm.linux.org.uk> References: <20110516172334.GD13659@n2100.arm.linux.org.uk> From: Russell King - ARM Linux To: linux-arm-kernel@lists.infradead.org, John Stultz , Thomas Gleixner Subject: [PATCH 08/19] clocksource: convert ARM 32-bit down counting clocksources MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110516_132824_970580_8363D76C X-CRM114-Status: GOOD ( 17.73 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [78.32.30.218 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Lennert Buytenhek , Sascha Hauer , Alessandro Rubini X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: Catalin Marinas Cc: Sascha Hauer Cc: Alessandro Rubini Acked-by: Linus Walleij Cc: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/Kconfig | 2 ++ arch/arm/common/timer-sp.c | 30 ++++++------------------------ arch/arm/plat-mxc/epit.c | 18 ++---------------- arch/arm/plat-nomadik/Kconfig | 1 + arch/arm/plat-nomadik/timer.c | 31 +++---------------------------- arch/arm/plat-orion/time.c | 21 ++------------------- 6 files changed, 16 insertions(+), 87 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9aa5514..0a05a57 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1042,6 +1042,7 @@ config PLAT_IOP config PLAT_ORION bool + select CLKSRC_MMIO select HAVE_SCHED_CLOCK config PLAT_PXA @@ -1052,6 +1053,7 @@ config PLAT_VERSATILE config ARM_TIMER_SP804 bool + select CLKSRC_MMIO source arch/arm/mm/Kconfig diff --git a/arch/arm/common/timer-sp.c b/arch/arm/common/timer-sp.c index 6ef3342..445b05e 100644 --- a/arch/arm/common/timer-sp.c +++ b/arch/arm/common/timer-sp.c @@ -32,35 +32,17 @@ #define TIMER_FREQ_KHZ (1000) #define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ) -static void __iomem *clksrc_base; - -static cycle_t sp804_read(struct clocksource *cs) -{ - return ~readl(clksrc_base + TIMER_VALUE); -} - -static struct clocksource clocksource_sp804 = { - .name = "timer3", - .rating = 200, - .read = sp804_read, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - void __init sp804_clocksource_init(void __iomem *base) { - struct clocksource *cs = &clocksource_sp804; - - clksrc_base = base; - /* setup timer 0 as free-running clocksource */ - writel(0, clksrc_base + TIMER_CTRL); - writel(0xffffffff, clksrc_base + TIMER_LOAD); - writel(0xffffffff, clksrc_base + TIMER_VALUE); + writel(0, base + TIMER_CTRL); + writel(0xffffffff, base + TIMER_LOAD); + writel(0xffffffff, base + TIMER_VALUE); writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, - clksrc_base + TIMER_CTRL); + base + TIMER_CTRL); - clocksource_register_khz(cs, TIMER_FREQ_KHZ); + clocksource_mmio_init(base + TIMER_VALUE, "timer3", + TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down); } diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c index d69d343..d3467f8 100644 --- a/arch/arm/plat-mxc/epit.c +++ b/arch/arm/plat-mxc/epit.c @@ -83,26 +83,12 @@ static void epit_irq_acknowledge(void) __raw_writel(EPITSR_OCIF, timer_base + EPITSR); } -static cycle_t epit_read(struct clocksource *cs) -{ - return 0 - __raw_readl(timer_base + EPITCNR); -} - -static struct clocksource clocksource_epit = { - .name = "epit", - .rating = 200, - .read = epit_read, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - static int __init epit_clocksource_init(struct clk *timer_clk) { unsigned int c = clk_get_rate(timer_clk); - clocksource_register_hz(&clocksource_epit, c); - - return 0; + return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32, + clocksource_mmio_readl_down); } /* clock event */ diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig index 187f4e8..18296ee 100644 --- a/arch/arm/plat-nomadik/Kconfig +++ b/arch/arm/plat-nomadik/Kconfig @@ -5,6 +5,7 @@ config PLAT_NOMADIK bool depends on ARCH_NOMADIK || ARCH_U8500 + select CLKSRC_MMIO default y help Common platform code for Nomadik and other ST-Ericsson diff --git a/arch/arm/plat-nomadik/timer.c b/arch/arm/plat-nomadik/timer.c index 4172340..ef74e15 100644 --- a/arch/arm/plat-nomadik/timer.c +++ b/arch/arm/plat-nomadik/timer.c @@ -26,29 +26,6 @@ void __iomem *mtu_base; /* Assigned by machine code */ /* - * Kernel assumes that sched_clock can be called early - * but the MTU may not yet be initialized. - */ -static cycle_t nmdk_read_timer_dummy(struct clocksource *cs) -{ - return 0; -} - -/* clocksource: MTU decrements, so we negate the value being read. */ -static cycle_t nmdk_read_timer(struct clocksource *cs) -{ - return -readl(mtu_base + MTU_VAL(0)); -} - -static struct clocksource nmdk_clksrc = { - .name = "mtu_0", - .rating = 200, - .read = nmdk_read_timer_dummy, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -/* * Override the global weak sched_clock symbol with this * local implementation which uses the clocksource to get some * better resolution when scheduling the kernel. @@ -172,12 +149,10 @@ void __init nmdk_timer_init(void) writel(0, mtu_base + MTU_BGLR(0)); writel(cr | MTU_CRn_ENA, mtu_base + MTU_CR(0)); - /* Now the clock source is ready */ - nmdk_clksrc.read = nmdk_read_timer; - - if (clocksource_register_hz(&nmdk_clksrc, rate)) + if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0", + rate, 200, 32, clocksource_mmio_readl_down)) pr_err("timer: failed to initialize clock source %s\n", - nmdk_clksrc.name); + "mtu_0"); init_sched_clock(&cd, nomadik_update_sched_clock, 32, rate); diff --git a/arch/arm/plat-orion/time.c b/arch/arm/plat-orion/time.c index 742b032..69a6136 100644 --- a/arch/arm/plat-orion/time.c +++ b/arch/arm/plat-orion/time.c @@ -81,24 +81,6 @@ static void __init setup_sched_clock(unsigned long tclk) } /* - * Clocksource handling. - */ -static cycle_t orion_clksrc_read(struct clocksource *cs) -{ - return 0xffffffff - readl(timer_base + TIMER0_VAL_OFF); -} - -static struct clocksource orion_clksrc = { - .name = "orion_clocksource", - .rating = 300, - .read = orion_clksrc_read, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - - - -/* * Clockevent handling. */ static int @@ -247,7 +229,8 @@ orion_time_init(u32 _bridge_base, u32 _bridge_timer1_clr_mask, writel(u & ~BRIDGE_INT_TIMER0, bridge_base + BRIDGE_MASK_OFF); u = readl(timer_base + TIMER_CTRL_OFF); writel(u | TIMER0_EN | TIMER0_RELOAD_EN, timer_base + TIMER_CTRL_OFF); - clocksource_register_hz(&orion_clksrc, tclk); + clocksource_mmio_init(timer_base + TIMER0_VAL_OFF, "orion_clocksource", + tclk, 300, 32, clocksource_mmio_readl_down); /* * Setup clockevent timer (interrupt-driven).