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i.MX6/PCIe and MSI interrupts

Message ID CAB5oZtC_X6Tk+6c5sZB06kDmhOgqmqW0_QG1GKWAJgqNpg2tag@mail.gmail.com
State New
Headers show

Commit Message

Harro Haan Dec. 6, 2013, 12:39 p.m. UTC 
On 6 December 2013 12:43, Marek Vasut <marex@denx.de> wrote:
> On Friday, December 06, 2013 at 10:32:31 AM, Jürgen Beisert wrote:
>> Hi,
>>
>> is anybody out there who has MSI interrupts successfully working on i.MX6?
>> I tried with my i.MX6 and a Gbit network card but without success. In
>> legacy interrupt mode it works.
>
> What precise model of card do you use ? Do you have a PCIe switch in the path or
> just direct RC-EP connection ?
>
>> I'm using various patches here from the list and the PCIe itself works. The
>> designware driver is prepared for MSI interrupts and the Exynos driver
>> makes use of it.
>
> OK
>
>> I added the same glue code to the i.MX6 driver but I can't get the INTD
>> interrupt to fire when MSI arrives (while the INTA fires in legacy
>> interrupt mode). Some idea what needs to be done in the i.MX6 to get MSI
>> working? The Exynos driver additionally changes some bits in its chipset
>> beside the PCIe unit to enable the MSI interrupt to its CPU. Are there
>> some 'hidden' bits in the i.MX6 as well?
>
> Can you post your prototype patch for the PCIe MSI so we can see what you did
> there please?

Attached are my patches of the first attempt to get MSI working for
the i.MX6. It looks like MSI is working but MSIX is not in combination
with e1000e and SabreSD. I did some successful iperf tests in MSI
mode. I did the following hack in
drivers/net/ethernet/intel/e1000e/param.c to disable MSIX:

-		if (adapter->flags & FLAG_HAS_MSIX) {
+		if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) {

In MSIX mode, the imx6_pcie_msi_irq_handler occurs, but
e1000_intr_msix_rx, e1000_intr_msix_tx or e1000_intr_msix_other does
not get called.

My MSI tests are not successful when testing it with a Xilinx PCIe
development board, while this FPGA design works properly with FSL
imx_3.0.35 (or on x86).

Best regards,

Harro

Comments

Juergen Borleis Dec. 6, 2013, 2:15 p.m. UTC | #1 
Hi Harro,

On Friday 06 December 2013 13:39:09 Harro Haan wrote:
> [...]
> Attached are my patches of the first attempt to get MSI working for
> the i.MX6. It looks like MSI is working but MSIX is not in combination
> with e1000e and SabreSD. I did some successful iperf tests in MSI
> mode. I did the following hack in
> drivers/net/ethernet/intel/e1000e/param.c to disable MSIX:
>
> -		if (adapter->flags & FLAG_HAS_MSIX) {
> +		if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) {

Arrrgh, after applying this change it starts to work immediately. So many 
hours...

> My MSI tests are not successful when testing it with a Xilinx PCIe
> development board, while this FPGA design works properly with FSL
> imx_3.0.35 (or on x86).

Same here. Network chip works with MSI, PCIe FPGA does not.

Regards and thanks for your help,
Juergen
Marek Vasut Dec. 7, 2013, 12:55 p.m. UTC | #2 
On Friday, December 06, 2013 at 11:19:05 PM, Richard Zhu wrote:
> Hi:
> I find a way make imx6 pcie msi/msix work without modify e1000e driver.
> But e1000e can’t work after suspend/resume.:(.
> The other ep devices (iwl wifi, xhci) can work well.
> I can post my modification next monday if you want.

Please do, thanks! :)

> Sent from Huawei Mobile
> 
> Jürgen Beisert <jbe@pengutronix.de>编写：
> 
> Hi Harro,
> 
> On Friday 06 December 2013 13:39:09 Harro Haan wrote:
> > [...]
> > Attached are my patches of the first attempt to get MSI working for
> > the i.MX6. It looks like MSI is working but MSIX is not in combination
> > with e1000e and SabreSD. I did some successful iperf tests in MSI
> > mode. I did the following hack in
> > drivers/net/ethernet/intel/e1000e/param.c to disable MSIX:
> > 
> > -             if (adapter->flags & FLAG_HAS_MSIX) {
> > +             if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) {
> 
> Arrrgh, after applying this change it starts to work immediately. So many
> hours...
> 
> > My MSI tests are not successful when testing it with a Xilinx PCIe
> > development board, while this FPGA design works properly with FSL
> > imx_3.0.35 (or on x86).
> 
> Same here. Network chip works with MSI, PCIe FPGA does not.
> 
> Regards and thanks for your help,
> Juergen
> 
> --
> Pengutronix e.K.                              | Juergen Beisert            
> | Linux Solutions for Science and Industry      |
> http://www.pengutronix.de/  |

Best regards,
Marek Vasut
Marek Vasut Dec. 10, 2013, 2:12 p.m. UTC | #3 
On Friday, December 06, 2013 at 03:15:50 PM, Jürgen Beisert wrote:
> Hi Harro,
> 
> On Friday 06 December 2013 13:39:09 Harro Haan wrote:
> > [...]
> > Attached are my patches of the first attempt to get MSI working for
> > the i.MX6. It looks like MSI is working but MSIX is not in combination
> > with e1000e and SabreSD. I did some successful iperf tests in MSI
> > mode. I did the following hack in
> > drivers/net/ethernet/intel/e1000e/param.c to disable MSIX:
> > 
> > -		if (adapter->flags & FLAG_HAS_MSIX) {
> > +		if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) {
> 
> Arrrgh, after applying this change it starts to work immediately. So many
> hours...
> 
> > My MSI tests are not successful when testing it with a Xilinx PCIe
> > development board, while this FPGA design works properly with FSL
> > imx_3.0.35 (or on x86).
> 
> Same here. Network chip works with MSI, PCIe FPGA does not.

Can you try patch from Message-ID: <20131210043409.GA2734@pratyush-vbox> ?

Best regards,
Marek Vasut
Harro Haan Dec. 12, 2013, 6:43 p.m. UTC | #4 
On 10 December 2013 15:12, Marek Vasut <marex@denx.de> wrote:
> On Friday, December 06, 2013 at 03:15:50 PM, Jürgen Beisert wrote:
>> Hi Harro,
>>
>> On Friday 06 December 2013 13:39:09 Harro Haan wrote:
>> > [...]
>> > Attached are my patches of the first attempt to get MSI working for
>> > the i.MX6. It looks like MSI is working but MSIX is not in combination
>> > with e1000e and SabreSD. I did some successful iperf tests in MSI
>> > mode. I did the following hack in
>> > drivers/net/ethernet/intel/e1000e/param.c to disable MSIX:
>> >
>> > -           if (adapter->flags & FLAG_HAS_MSIX) {
>> > +           if (!(adapter->flags & FLAG_HAS_MSIX)/*TEMP*/) {
>>
>> Arrrgh, after applying this change it starts to work immediately. So many
>> hours...
>>
>> > My MSI tests are not successful when testing it with a Xilinx PCIe
>> > development board, while this FPGA design works properly with FSL
>> > imx_3.0.35 (or on x86).
>>
>> Same here. Network chip works with MSI, PCIe FPGA does not.
>
> Can you try patch from Message-ID: <20131210043409.GA2734@pratyush-vbox> ?

I assume you mean the following patch:
[PATCH 08/12] pcie: designware: Fix IO transfers
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/218048.html

This patch did not solve the problem with the FPGA design. After
further debugging it turned out that I was missing MSI IRQs. Therefore
the following patch is supplied:
[PATCH] pci: designware: fix missing msi irqs
http://lists.infradead.org/pipermail/linux-arm-kernel/2013-December/218629.html

Regards,

Harro
diff mbox

Patch

From 0768eeafd5a6299e4c8d88af87dacad9d9582dc4 Mon Sep 17 00:00:00 2001
From: Harro Haan <hrhaan@gmail.com>
Date: Thu, 5 Dec 2013 14:06:37 +0100
Subject: [PATCH 2/2] PCI: imx6: add support for MSI

This patch adds support for Message Signaled Interrupt in the
imx6q-pcie driver. It is done in a similar way as for the Exynos
PCIe driver (commit f342d940ee0e3a2b5197fd4fbade1cb6bbc960b7),
which is also using the Synopsys designware PCIe IP core.

Signed-off-by: Harro Haan <hrhaan@gmail.com>
---
 drivers/pci/host/pci-imx6.c |   29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index bd70af8..b548d38 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -14,6 +14,7 @@ 
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/gpio.h>
+#include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/mfd/syscon.h>
 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
@@ -328,6 +329,9 @@  static void imx6_pcie_host_init(struct pcie_port *pp)
 		}
 	}
 
+	if (IS_ENABLED(CONFIG_PCI_MSI))
+		dw_pcie_msi_init(pp);
+
 	return;
 }
 
@@ -382,6 +386,15 @@  static struct pcie_host_ops imx6_pcie_host_ops = {
 	.host_init = imx6_pcie_host_init,
 };
 
+static irqreturn_t imx6_pcie_msi_irq_handler(int irq, void *arg)
+{
+	struct pcie_port *pp = arg;
+
+	dw_handle_msi_irq(pp);
+
+	return IRQ_HANDLED;
+}
+
 static int imx6_add_pcie_port(struct pcie_port *pp,
 			struct platform_device *pdev)
 {
@@ -393,6 +406,22 @@  static int imx6_add_pcie_port(struct pcie_port *pp,
 		return -ENODEV;
 	}
 
+	if (IS_ENABLED(CONFIG_PCI_MSI)) {
+		pp->msi_irq = platform_get_irq(pdev, 1);
+		if (!pp->msi_irq) {
+			dev_err(&pdev->dev, "failed to get msi irq\n");
+			return -ENODEV;
+		}
+
+		ret = devm_request_irq(&pdev->dev, pp->msi_irq,
+					imx6_pcie_msi_irq_handler,
+					IRQF_SHARED, "imx6q-pcie", pp);
+		if (ret) {
+			dev_err(&pdev->dev, "failed to request msi irq\n");
+			return ret;
+		}
+	}
+
 	pp->root_bus_nr = -1;
 	pp->ops = &imx6_pcie_host_ops;
 
-- 
1.7.9.5