| Message ID | 70db24a03b552ca553e6435306d895644fb08545.1545131728.git.mirq-linux@rere.qmqm.pl |
|---|---|
| State | New |
| Headers | show |
| Series | [v3] clk: at91: optimize clk_round_rate() for AUDIO_PLL | expand |
On 18/12/2018 at 12:20, Michał Mirosław wrote: > Stop the search for parent rate when exact match is found. > > This makes for 3 clk_round_rate() calls instead of 64 of them on > SAMA5D2-based board when searching for 12.288MHz clock. > > Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> It looks correct to me: Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com> Thanks Michał! Best regards, Nicolas > --- > v2: rebased on v4.20-rc7 > v3: formatting and commit description changes > --- > drivers/clk/at91/clk-audio-pll.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c > index 36d77146a3bd..3cc4a82f4e9f 100644 > --- a/drivers/clk/at91/clk-audio-pll.c > +++ b/drivers/clk/at91/clk-audio-pll.c > @@ -340,7 +340,12 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, > pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__, > rate, *parent_rate); > > - for (div = 1; div <= AUDIO_PLL_QDPMC_MAX; div++) { > + if (!rate) > + return 0; > + > + best_parent_rate = clk_round_rate(pclk->clk, 1); > + div = max(best_parent_rate / rate, 1UL); > + for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { > best_parent_rate = clk_round_rate(pclk->clk, rate * div); > tmp_rate = best_parent_rate / div; > tmp_diff = abs(rate - tmp_rate); > @@ -350,6 +355,8 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, > best_rate = tmp_rate; > best_diff = tmp_diff; > tmp_qd = div; > + if (!best_diff) > + break; /* got exact match */ > } > } > >
Quoting Michał Mirosław (2018-12-18 03:20:48) > Stop the search for parent rate when exact match is found. > > This makes for 3 clk_round_rate() calls instead of 64 of them on > SAMA5D2-based board when searching for 12.288MHz clock. > > Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> > --- Applied to clk-next
diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c index 36d77146a3bd..3cc4a82f4e9f 100644 --- a/drivers/clk/at91/clk-audio-pll.c +++ b/drivers/clk/at91/clk-audio-pll.c @@ -340,7 +340,12 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, pr_debug("A PLL/PMC: %s, rate = %lu (parent_rate = %lu)\n", __func__, rate, *parent_rate); - for (div = 1; div <= AUDIO_PLL_QDPMC_MAX; div++) { + if (!rate) + return 0; + + best_parent_rate = clk_round_rate(pclk->clk, 1); + div = max(best_parent_rate / rate, 1UL); + for (; div <= AUDIO_PLL_QDPMC_MAX; div++) { best_parent_rate = clk_round_rate(pclk->clk, rate * div); tmp_rate = best_parent_rate / div; tmp_diff = abs(rate - tmp_rate); @@ -350,6 +355,8 @@ static long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long rate, best_rate = tmp_rate; best_diff = tmp_diff; tmp_qd = div; + if (!best_diff) + break; /* got exact match */ } }
Stop the search for parent rate when exact match is found. This makes for 3 clk_round_rate() calls instead of 64 of them on SAMA5D2-based board when searching for 12.288MHz clock. Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl> --- v2: rebased on v4.20-rc7 v3: formatting and commit description changes --- drivers/clk/at91/clk-audio-pll.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)