diff mbox series

[v2] ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs

Message ID 20201116165826.51570-1-ivan.zaentsev@wirenboard.ru
State New
Headers show
Series [v2] ARM: mxs: Add serial number support for i.MX23, i.MX28 SoCs | expand

Commit Message

Ivan Zaentsev Nov. 16, 2020, 4:58 p.m. UTC 
i.MX23 and i.MX28 SoCs unique identifiers are factory-programmed
in On-Chip OTP memory. i.MX28's 64-bit unique id is in
HW_OCOTP_OPS2:HW_OCOTP_OPS3 (see MCIMX28 Ref. Man., sec. 20.4.22-23).

i.MX23 provides 32-bit long unique id in HW_OCOTP_OPS3.
Though not clearly documented, there is a clue in sec. 35.9.3.

The unique id is reported in /sys/devices/soc0/serial_number
and in /proc/cpuinfo

Signed-off-by: Ivan Zaentsev <ivan.zaentsev@wirenboard.ru>
Suggested-by: Evgeny Boger <boger@wirenboard.com>
---
Changes in v2:

1. Sort #includes aphabetically.
2. Use tabs instead of spaces for indent.
3. Remove unnecessary newline.

 arch/arm/mach-mxs/mach-mxs.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

Comments

Shawn Guo Nov. 30, 2020, 9:32 a.m. UTC | #1 
On Mon, Nov 16, 2020 at 07:58:26PM +0300, Ivan Zaentsev wrote:
> i.MX23 and i.MX28 SoCs unique identifiers are factory-programmed
> in On-Chip OTP memory. i.MX28's 64-bit unique id is in
> HW_OCOTP_OPS2:HW_OCOTP_OPS3 (see MCIMX28 Ref. Man., sec. 20.4.22-23).
> 
> i.MX23 provides 32-bit long unique id in HW_OCOTP_OPS3.
> Though not clearly documented, there is a clue in sec. 35.9.3.
> 
> The unique id is reported in /sys/devices/soc0/serial_number
> and in /proc/cpuinfo
> 
> Signed-off-by: Ivan Zaentsev <ivan.zaentsev@wirenboard.ru>
> Suggested-by: Evgeny Boger <boger@wirenboard.com>

Applied, thanks.
diff mbox series

Patch

diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index c109f47e9cbc..25c9d184fa4c 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -22,6 +22,7 @@ 
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
+#include <asm/system_info.h>
 #include <asm/system_misc.h>
 
 #include "pm.h"
@@ -51,6 +52,9 @@ 
 #define MXS_CLR_ADDR		0x8
 #define MXS_TOG_ADDR		0xc
 
+#define HW_OCOTP_OPS2		19	/* offset 0x150 */
+#define HW_OCOTP_OPS3		20	/* offset 0x160 */
+
 static u32 chipid;
 static u32 socid;
 
@@ -379,6 +383,8 @@  static void __init mxs_machine_init(void)
 	struct device *parent;
 	struct soc_device *soc_dev;
 	struct soc_device_attribute *soc_dev_attr;
+	u64 soc_uid = 0;
+	const u32 *ocotp = mxs_get_ocotp();
 	int ret;
 
 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
@@ -394,8 +400,21 @@  static void __init mxs_machine_init(void)
 	soc_dev_attr->soc_id = mxs_get_soc_id();
 	soc_dev_attr->revision = mxs_get_revision();
 
+	if (socid == HW_DIGCTL_CHIPID_MX23) {
+		soc_uid = system_serial_low = ocotp[HW_OCOTP_OPS3];
+	} else if (socid == HW_DIGCTL_CHIPID_MX28) {
+		soc_uid = system_serial_high = ocotp[HW_OCOTP_OPS2];
+		soc_uid <<= 32;
+		system_serial_low = ocotp[HW_OCOTP_OPS3];
+		soc_uid |= system_serial_low;
+	}
+
+	if (soc_uid)
+		soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid);
+
 	soc_dev = soc_device_register(soc_dev_attr);
 	if (IS_ERR(soc_dev)) {
+		kfree(soc_dev_attr->serial_number);
 		kfree(soc_dev_attr->revision);
 		kfree(soc_dev_attr);
 		return;