diff mbox series

[2/3] arm64: dts: armada-3720-espressobin: make use of switch irq line

Message ID 20180321105005.18426-2-u.kleine-koenig@pengutronix.de
State New
Headers show
Series [1/3] arm64: dts: marvell: armada-37xx: mark the gpio controllers as irq controller | expand

Commit Message

Uwe Kleine-König March 21, 2018, 10:50 a.m. UTC
The switch's INTn line is connected to the CPU's MPP2_23 pad. Wire this
up in the device tree. Note however that up to now the
marvell,armada3710-sb-pinctrl driver doesn't support level irqs, so the
switch driver doesn't make use of this feature.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Andrew Lunn March 21, 2018, 1:15 p.m. UTC | #1
On Wed, Mar 21, 2018 at 11:50:04AM +0100, Uwe Kleine-König wrote:
> The switch's INTn line is connected to the CPU's MPP2_23 pad. Wire this
> up in the device tree. Note however that up to now the
> marvell,armada3710-sb-pinctrl driver doesn't support level irqs, so the
> switch driver doesn't make use of this feature.

Hi Uwe

So that actually happens here, if the interrupt cannot be used? I
assume the mv88e6xxx driver does not fail the probe because the IRQ
cannot be configured? What does happen?

Thanks
	Andrew
Uwe Kleine-König March 21, 2018, 1:23 p.m. UTC | #2
Hello Andrew,

On Wed, Mar 21, 2018 at 02:15:36PM +0100, Andrew Lunn wrote:
> On Wed, Mar 21, 2018 at 11:50:04AM +0100, Uwe Kleine-König wrote:
> > The switch's INTn line is connected to the CPU's MPP2_23 pad. Wire this
> > up in the device tree. Note however that up to now the
> > marvell,armada3710-sb-pinctrl driver doesn't support level irqs, so the
> > switch driver doesn't make use of this feature.
> 
> So that actually happens here, if the interrupt cannot be used? I
> assume the mv88e6xxx driver does not fail the probe because the IRQ
> cannot be configured? What does happen?

Grml, I just tried with all patches applied and it results in:

[    4.777524] mv88e6085 d0032004.mdio-mii:01: switch 0x3410 detected: Marvell 88E6341, revision 0
[    4.794723] genirq: Setting trigger mode 8 for irq 41 failed (armada_37xx_irq_set_type+0x0/0x160)
[    4.804470] mv88e6085: probe of d0032004.mdio-mii:01 failed with error -22

. It (kind of) worked before your patch

	net: dsa: mv88e6xxx: Use the DT IRQ trigger mode

. So I guess this has to change to

+               interrupt-parent = <&gpiosb>;
+		/* actually the irq is active low, but gpiosb doesn't support that and falling edge seems to work just fine */
+               interrupts = <23 IRQ_TYPE_EDGE_FALLING>;

Best regards
Uwe
Andrew Lunn March 21, 2018, 1:29 p.m. UTC | #3
> . So I guess this has to change to
> 
> +               interrupt-parent = <&gpiosb>;
> +		/* actually the irq is active low, but gpiosb doesn't support that and falling edge seems to work just fine */
> +               interrupts = <23 IRQ_TYPE_EDGE_FALLING>;

Or wait until you have simulated level interrupts?

At the moment, without this patch, you should have driver polled
interrupts. That already gives you a good speedup over phylib polling
the PHYs.

    Andrew
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
index 6d070b267abe..a88f053d2f28 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
@@ -133,6 +133,11 @@ 
 		#size-cells = <0>;
 		reg = <1>;
 
+		interrupt-parent = <&gpiosb>;
+		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+
 		dsa,member = <0 0>;
 
 		ports {
@@ -171,12 +176,20 @@ 
 
 			switch0phy0: switch0phy0@11 {
 				reg = <0x11>;
+				interrupt-parent = <&switch0>;
+				interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			switch0phy1: switch0phy1@12 {
 				reg = <0x12>;
+				interrupt-parent = <&switch0>;
+				interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
 			};
+
 			switch0phy2: switch0phy2@13 {
 				reg = <0x13>;
+				interrupt-parent = <&switch0>;
+				interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
 			};
 		};
 	};