From patchwork Thu Feb 23 16:45:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 731617 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vTgYx0MCtz9s7N for ; Fri, 24 Feb 2017 04:04:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="HTdJX6fI"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ok2a+GCGBQqXDNzToIn+1sEXIqw74Dd7GV71aEWucjw=; b=HTdJX6fI36uZDd 2EKxpJZcWyyuI5hNj9TBTtPxhy9GwpiVai1OOt6O9Zv5VWmtbqfOpaokvhxfo0E9/WijaWD5bzBtY qelt+Hvl65A109fjvtdIqz8CEmzbo0QYIP8NZMfP1V+dqjc/2mQV6dHwoctf76flapwZzsLlv31SC 3bVLPWBebVTTQHcSwTgqiOEVHKFVYyhBd+xHeZqbqgJfgZz5b6x0+cX17I6mTOLDpvDWAzlp8rwDq n6EBpxNLnZ+9BloPriafmHDLfOx66abB3sCkBIKqcAcYAP03Xc9uurBVxEDijtp1cKiogTAQmdzqR q1LRcPdBumkb7/l3VP4A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cgwoC-0000le-GW; Thu, 23 Feb 2017 17:04:00 +0000 Received: from mx2.suse.de ([195.135.220.15]) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cgwXW-00011O-PS for linux-arm-kernel@lists.infradead.org; Thu, 23 Feb 2017 16:46:51 +0000 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx2.suse.de (Postfix) with ESMTP id A5DD8ACBB; Thu, 23 Feb 2017 16:46:22 +0000 (UTC) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: arm@kernel.org Subject: [PATCH v2 4/5] ARM64: dts: Prepare Realtek RTD1295 and Zidoo X9S Date: Thu, 23 Feb 2017 17:45:51 +0100 Message-Id: <20170223164553.3715-5-afaerber@suse.de> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170223164553.3715-1-afaerber@suse.de> References: <20170223164553.3715-1-afaerber@suse.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170223_084647_423806_F80345C2 X-CRM114-Status: GOOD ( 19.62 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [195.135.220.15 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Roc He , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Rob Herring , =?UTF-8?q?Andreas=20F=C3=A4rber?= , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Add initial device trees for the RTD1295 SoC and the Zidoo X9S TV box. The CPUs lack the enable-method property because the vendor device tree uses a custom "rtk-spin-table" method and "psci" did not appear to work. The UARTs lack the interrupts properties because the vendor device tree connects them to a custom interrupt controller. earlycon works without. A list of memory reservations is adopted from v1.2.11 vendor device tree: 0x02200000 can be used for an initrd, 0x01b00000 is audio-related; ion-related 0x02600000, 0x02c00000 and 0x11000000 are left out; 0x10000000 is used for sharing the U-Boot environment; others remain to be investigated. Acked-by: Arnd Bergmann Signed-off-by: Andreas Färber --- v1 -> v2: * Dropped 0x0000000010000000 /memreserve/ arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/realtek/Makefile | 5 + arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts | 78 +++++++++++ arch/arm64/boot/dts/realtek/rtd1295.dtsi | 162 ++++++++++++++++++++++ 4 files changed, 246 insertions(+) create mode 100644 arch/arm64/boot/dts/realtek/Makefile create mode 100644 arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts create mode 100644 arch/arm64/boot/dts/realtek/rtd1295.dtsi diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index 080232b..78f7991 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -14,6 +14,7 @@ dts-dirs += marvell dts-dirs += mediatek dts-dirs += nvidia dts-dirs += qcom +dts-dirs += realtek dts-dirs += renesas dts-dirs += rockchip dts-dirs += socionext diff --git a/arch/arm64/boot/dts/realtek/Makefile b/arch/arm64/boot/dts/realtek/Makefile new file mode 100644 index 0000000..8521e92 --- /dev/null +++ b/arch/arm64/boot/dts/realtek/Makefile @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts new file mode 100644 index 0000000..53302bb --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1295-zidoo-x9s.dts @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2016-2017 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; + +/memreserve/ 0x0000000000000000 0x0000000000030000; +/memreserve/ 0x000000000001f000 0x0000000000001000; +/memreserve/ 0x0000000000030000 0x00000000000d0000; +/memreserve/ 0x0000000001b00000 0x00000000004be000; +/memreserve/ 0x0000000001ffe000 0x0000000000004000; + +#include "rtd1295.dtsi" + +/ { + compatible = "zidoo,x9s", "realtek,rtd1295"; + model = "Zidoo X9S"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + aliases { + serial0 = &uart0; + serial1 = &uart1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/dts/realtek/rtd1295.dtsi new file mode 100644 index 0000000..ec81ceb --- /dev/null +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2016-2017 Andreas Färber + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +/ { + compatible = "realtek,rtd1295"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x0>; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x1>; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x2>; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0 0x3>; + next-level-cache = <&l2>; + }; + + l2: l2-cache { + compatible = "cache"; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + tee@10100000 { + reg = <0x0 0x10100000 0x0 0xf00000>; + no-map; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + uart0: serial@98007800 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x98007800 0x0 0x400>, + <0x0 0x98007000 0x0 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + uart1: serial@9801b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x9801b200 0x0 0x100>, + <0x0 0x9801b00c 0x0 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + uart2: serial@9801b400 { + compatible = "snps,dw-apb-uart"; + reg = <0x0 0x9801b400 0x0 0x100>, + <0x0 0x9801b00c 0x0 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <432000000>; + status = "disabled"; + }; + + gic: interrupt-controller@ff011000 { + compatible = "arm,gic-400"; + reg = <0x0 0xff011000 0x0 0x1000>, + <0x0 0xff012000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; +};