From patchwork Fri Apr 3 09:35:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianwei Wang X-Patchwork-Id: 457911 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2001:1868:205::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 93C5D140082 for ; Fri, 3 Apr 2015 21:04:12 +1100 (AEDT) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YdyOn-00029n-9R; Fri, 03 Apr 2015 10:00:25 +0000 Received: from mail-bn1on0132.outbound.protection.outlook.com ([157.56.110.132] helo=na01-bn1-obe.outbound.protection.outlook.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Ydy53-00008Q-95 for linux-arm-kernel@lists.infradead.org; Fri, 03 Apr 2015 09:40:02 +0000 Received: from CO2PR03CA0019.namprd03.prod.outlook.com (10.141.194.146) by DM2PR0301MB0880.namprd03.prod.outlook.com (25.160.216.142) with Microsoft SMTP Server (TLS) id 15.1.118.21; Fri, 3 Apr 2015 09:39:35 +0000 Received: from BY2FFO11FD046.protection.gbl (2a01:111:f400:7c0c::102) by CO2PR03CA0019.outlook.office365.com (2a01:111:e400:1414::18) with Microsoft SMTP Server (TLS) id 15.1.106.15 via Frontend Transport; Fri, 3 Apr 2015 09:39:34 +0000 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=freescale.com; cmss.chinamobile.com; dkim=none (message not signed) header.d=none; Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD046.mail.protection.outlook.com (10.1.15.170) with Microsoft SMTP Server (TLS) id 15.1.136.16 via Frontend Transport; Fri, 3 Apr 2015 09:39:33 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id t339dJus003786; Fri, 3 Apr 2015 02:39:29 -0700 From: Jianwei Wang To: , , , , Subject: [PATCH v4 2/4] arm/layerscape/ls1021a: DCU pixel clock control Date: Fri, 3 Apr 2015 17:35:57 +0800 Message-ID: <1428053759-3129-3-git-send-email-b52261@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1428053759-3129-1-git-send-email-b52261@freescale.com> References: <1428053759-3129-1-git-send-email-b52261@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; BMV:1; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(189002)(199003)(19580405001)(33646002)(92566002)(6806004)(229853001)(85426001)(46102003)(36756003)(105606002)(106466001)(50226001)(50986999)(19580395003)(104016003)(76176999)(77156002)(77096005)(62966003)(2201001)(2950100001)(87936001)(47776003)(50466002)(48376002)(2101003)(42262002); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR0301MB0880; H:tx30smr01.am.freescale.net; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DM2PR0301MB0880; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(5002010)(5005006); SRVR:DM2PR0301MB0880; BCL:0; PCL:0; RULEID:; SRVR:DM2PR0301MB0880; X-Forefront-PRVS: 05352A48BE X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Apr 2015 09:39:33.1312 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB0880 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150403_024001_570048_6A861C3C X-CRM114-Status: UNSURE ( 8.57 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.0 on bombadil.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, no trust [157.56.110.132 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [157.56.110.132 listed in wl.mailspike.net] -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record Cc: Xiubo Li , Alison Wang , linux-kernel@vger.kernel.org, Jianwei Wang , Jason.Jin@freescale.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Enable DCU pixel clock when platform devices initinalizing and provide enable and disable pixel clock functions for drm driver Signed-off-by: Alison Wang Signed-off-by: Xiubo Li Signed-off-by: Jianwei Wang --- arch/arm/mach-imx/mach-ls1021a.c | 36 ++++++++++++++++++++++++++++++++++++ include/linux/fsl/dcu.h | 22 ++++++++++++++++++++++ 2 files changed, 58 insertions(+) create mode 100644 include/linux/fsl/dcu.h diff --git a/arch/arm/mach-imx/mach-ls1021a.c b/arch/arm/mach-imx/mach-ls1021a.c index b89c858..4fb346d 100644 --- a/arch/arm/mach-imx/mach-ls1021a.c +++ b/arch/arm/mach-imx/mach-ls1021a.c @@ -8,9 +8,44 @@ */ #include +#include +#include +#include +#include #include "common.h" +void dcu_pixclk_disable(void) +{ + struct regmap *scfg_regmap; + + scfg_regmap = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); + if (IS_ERR(scfg_regmap)) { + pr_err("No syscfg phandle specified\n"); + return; + } + + regmap_write(scfg_regmap, SCFG_PIXCLKCR, PXCK_DISABLE); +} + +void dcu_pixclk_enable(void) +{ + struct regmap *scfg_regmap; + + scfg_regmap = syscon_regmap_lookup_by_compatible("fsl,ls1021a-scfg"); + if (IS_ERR(scfg_regmap)) { + pr_err("No syscfg phandle specified\n"); + return; + } + + regmap_write(scfg_regmap, SCFG_PIXCLKCR, PXCK_ENABLE); +} + +static void __init ls1021a_init_machine(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + dcu_pixclk_enable(); +} static const char * const ls1021a_dt_compat[] __initconst = { "fsl,ls1021a", NULL, @@ -18,5 +53,6 @@ static const char * const ls1021a_dt_compat[] __initconst = { DT_MACHINE_START(LS1021A, "Freescale LS1021A") .smp = smp_ops(ls1021a_smp_ops), + .init_machine = ls1021a_init_machine, .dt_compat = ls1021a_dt_compat, MACHINE_END diff --git a/include/linux/fsl/dcu.h b/include/linux/fsl/dcu.h new file mode 100644 index 0000000..1873057 --- /dev/null +++ b/include/linux/fsl/dcu.h @@ -0,0 +1,22 @@ +/* + * Copyright 2015 Freescale Semiconductor, Inc. + * + * Freescale DCU drm device driver + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __FSL_DCU_H__ +#define __FSL_DCU_H__ + +#define SCFG_PIXCLKCR 0x28 +#define PXCK_ENABLE BIT(31) +#define PXCK_DISABLE 0 + +void dcu_pixclk_enable(void); +void dcu_pixclk_disable(void); + +#endif /* __FSL_DCU_H__ */