From patchwork Mon Mar 25 15:17:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 230743 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 828AD2C008C for ; Tue, 26 Mar 2013 02:23:46 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK9B8-0004x2-Gc; Mon, 25 Mar 2013 15:19:18 +0000 Received: from co9ehsobe003.messaging.microsoft.com ([207.46.163.26] helo=co9outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1UK990-0004D7-Ap for linux-arm-kernel@lists.infradead.org; Mon, 25 Mar 2013 15:17:08 +0000 Received: from mail154-co9-R.bigfish.com (10.236.132.251) by CO9EHSOBE015.bigfish.com (10.236.130.78) with Microsoft SMTP Server id 14.1.225.23; Mon, 25 Mar 2013 15:17:00 +0000 Received: from mail154-co9 (localhost [127.0.0.1]) by mail154-co9-R.bigfish.com (Postfix) with ESMTP id 005B0420148; Mon, 25 Mar 2013 15:17:00 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275dhz2dh87h2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1155h) X-FB-DOMAIN-IP-MATCH: fail Received: from mail154-co9 (localhost.localdomain [127.0.0.1]) by mail154-co9 (MessageSwitch) id 1364224617937682_26781; Mon, 25 Mar 2013 15:16:57 +0000 (UTC) Received: from CO9EHSMHS006.bigfish.com (unknown [10.236.132.227]) by mail154-co9.bigfish.com (Postfix) with ESMTP id D84AB2C0060; Mon, 25 Mar 2013 15:16:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS006.bigfish.com (10.236.130.16) with Microsoft SMTP Server (TLS) id 14.1.225.23; Mon, 25 Mar 2013 15:16:55 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.328.11; Mon, 25 Mar 2013 15:16:55 +0000 Received: from S2101-09.ap.freescale.net ([10.192.185.59]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r2PFGhFE010835; Mon, 25 Mar 2013 08:16:53 -0700 From: Shawn Guo To: Subject: [PATCH 5/6] ARM: mxs: select STMP_DEVICE and use it for timer code Date: Mon, 25 Mar 2013 23:17:31 +0800 Message-ID: <1364224652-28332-6-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364224652-28332-1-git-send-email-shawn.guo@linaro.org> References: <1364224652-28332-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20130325_111707_404939_8C0C7A92 X-CRM114-Status: GOOD ( 11.46 ) X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [207.46.163.26 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Shawn Guo X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Select STMP_DEVICE and in timer code replace mxs_reset_block() with stmp_reset_block(), use STMP_OFFSET_REG_SET/CLR to replace __mxs_setl/clrl. As the result, and includsion can be removed from timer.c now. Signed-off-by: Shawn Guo --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/timer.c | 17 ++++++++--------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d57fc3d..6f61286 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -481,6 +481,7 @@ config ARCH_MXS select MULTI_IRQ_HANDLER select PINCTRL select SPARSE_IRQ + select STMP_DEVICE select USE_OF help Support for Freescale MXS-based family of processors diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index f4dd96ff..a4d469b 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -28,11 +28,10 @@ #include #include #include +#include #include #include -#include -#include /* * There are 2 versions of the timrot on Freescale MXS-based SoCs. @@ -85,20 +84,20 @@ static u32 timrot_major_version; static inline void timrot_irq_disable(void) { - __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ_EN, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR); } static inline void timrot_irq_enable(void) { - __mxs_setl(BM_TIMROT_TIMCTRLn_IRQ_EN, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_SET); } static void timrot_irq_acknowledge(void) { - __mxs_clrl(BM_TIMROT_TIMCTRLn_IRQ, - mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); + __raw_writel(BM_TIMROT_TIMCTRLn_IRQ, mxs_timrot_base + + HW_TIMROT_TIMCTRLn(0) + STMP_OFFSET_REG_CLR); } static cycle_t timrotv1_get_cycles(struct clocksource *cs) @@ -262,7 +261,7 @@ static void __init mxs_timer_init(struct device_node *np) /* * Initialize timers to a known state */ - mxs_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL); + stmp_reset_block(mxs_timrot_base + HW_TIMROT_ROTCTRL); /* get timrot version */ timrot_major_version = __raw_readl(mxs_timrot_base +