From patchwork Thu Jun 14 05:59:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 164834 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id DC5261007D1 for ; Thu, 14 Jun 2012 16:09:14 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sf3Au-0002bA-MJ; Thu, 14 Jun 2012 06:04:57 +0000 Received: from db3ehsobe006.messaging.microsoft.com ([213.199.154.144] helo=db3outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Sf37D-0008NR-Og for linux-arm-kernel@lists.infradead.org; Thu, 14 Jun 2012 06:01:09 +0000 Received: from mail65-db3-R.bigfish.com (10.3.81.241) by DB3EHSOBE002.bigfish.com (10.3.84.22) with Microsoft SMTP Server id 14.1.225.23; Thu, 14 Jun 2012 06:00:00 +0000 Received: from mail65-db3 (localhost [127.0.0.1]) by mail65-db3-R.bigfish.com (Postfix) with ESMTP id 0063B1004E4; Thu, 14 Jun 2012 06:00:00 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzc89bhzz1202hzz8275bh8275dhz2dh87h2a8h668h839h93fhd24he5bhe96hf0ah) X-FB-DOMAIN-IP-MATCH: fail Received: from mail65-db3 (localhost.localdomain [127.0.0.1]) by mail65-db3 (MessageSwitch) id 133965359842367_10943; Thu, 14 Jun 2012 05:59:58 +0000 (UTC) Received: from DB3EHSMHS011.bigfish.com (unknown [10.3.81.225]) by mail65-db3.bigfish.com (Postfix) with ESMTP id F11E7320047; Thu, 14 Jun 2012 05:59:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS011.bigfish.com (10.3.87.111) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 14 Jun 2012 05:59:56 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Thu, 14 Jun 2012 01:01:00 -0500 Received: from S2101-09.ap.freescale.net ([10.192.185.88]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q5E5xmZ1000483; Wed, 13 Jun 2012 23:00:55 -0700 From: Shawn Guo To: Subject: [PATCH 15/16] ARM: fiq: save FIQ_START by passing absolute fiq number Date: Thu, 14 Jun 2012 13:59:46 +0800 Message-ID: <1339653587-4832-16-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1339653587-4832-1-git-send-email-shawn.guo@linaro.org> References: <1339653587-4832-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [213.199.154.144 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Kukjin Kim , Russell King , Arnd Bergmann , Tony Lindgren , Sascha Hauer , Nicolas Ferre , Rob Herring , Grant Likely , Shawn Guo , Dong Aisheng X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org The commit a2be01b (ARM: only include mach/irqs.h for !SPARSE_IRQ) makes mach/irqs.h only be included for !SPARSE_IRQ build. There are a nubmer of platforms have FIQ_START defined in mach/irqs.h. arch/arm/mach-at91/include/mach/irqs.h:#define FIQ_START AT91_ID_FIQ arch/arm/mach-rpc/include/mach/irqs.h:#define FIQ_START 64 arch/arm/mach-s3c24xx/include/mach/irqs.h:#define FIQ_START IRQ_EINT0 arch/arm/plat-mxc/include/mach/irqs.h:#define FIQ_START 0 arch/arm/plat-omap/include/plat/irqs.h:#define FIQ_START 1024 If SPARSE_IRQ is enabled for any of these platforms, the following compile error will be seen. arch/arm/kernel/fiq.c: In function ‘enable_fiq’: arch/arm/kernel/fiq.c:127:19: error: ‘FIQ_START’ undeclared (first use in this function) arch/arm/kernel/fiq.c:127:19: note: each undeclared identifier is reported only once for each function it appears in arch/arm/kernel/fiq.c: In function ‘disable_fiq’: arch/arm/kernel/fiq.c:132:20: error: ‘FIQ_START’ undeclared (first use in this function) Though FIQ_START is defined in above 5 platforms, a grep on the whole tree only reports the following users of enable_fiq/disable_fiq. arch/arm/mach-rpc/dma.c drivers/media/video/mx1_camera.c sound/soc/fsl/imx-pcm-fiq.c That said, only rpc and imx are actually using enable_fiq/disable_fiq. The patch changes enable_fiq/disable_fiq a little bit to have the absolute fiq number than offset passed into by parameter "fiq". While fiq on imx starts from 0, only rpc needs a fix-up to adapt the change. With this change, all those FIQ_START definitions in platform irqs.h can be removed now, but we chose to leave the decision to platform maintainers, it should be removed or just left there as a document on where fiq starts on the platform. Signed-off-by: Shawn Guo Cc: Russell King Cc: Nicolas Ferre Cc: Tony Lindgren Cc: Kukjin Kim Acked-by: Dong Aisheng --- arch/arm/kernel/fiq.c | 4 ++-- arch/arm/mach-rpc/include/mach/irqs.h | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c index c32f845..5953bea 100644 --- a/arch/arm/kernel/fiq.c +++ b/arch/arm/kernel/fiq.c @@ -124,12 +124,12 @@ void release_fiq(struct fiq_handler *f) void enable_fiq(int fiq) { - enable_irq(fiq + FIQ_START); + enable_irq(fiq); } void disable_fiq(int fiq) { - disable_irq(fiq + FIQ_START); + disable_irq(fiq); } EXPORT_SYMBOL(set_fiq_handler); diff --git a/arch/arm/mach-rpc/include/mach/irqs.h b/arch/arm/mach-rpc/include/mach/irqs.h index 6868e17..4962bdd 100644 --- a/arch/arm/mach-rpc/include/mach/irqs.h +++ b/arch/arm/mach-rpc/include/mach/irqs.h @@ -31,15 +31,15 @@ #define IRQ_DMAS0 20 #define IRQ_DMAS1 21 -#define FIQ_FLOPPYDATA 0 -#define FIQ_ECONET 2 -#define FIQ_SERIALPORT 4 -#define FIQ_EXPANSIONCARD 6 -#define FIQ_FORCE 7 - /* * This is the offset of the FIQ "IRQ" numbers */ #define FIQ_START 64 +#define FIQ_FLOPPYDATA (FIQ_START + 0) +#define FIQ_ECONET (FIQ_START + 2) +#define FIQ_SERIALPORT (FIQ_START + 4) +#define FIQ_EXPANSIONCARD (FIQ_START + 6) +#define FIQ_FORCE (FIQ_START + 7) + #define NR_IRQS 128