From patchwork Thu Jun 14 05:59:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Guo X-Patchwork-Id: 164828 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id AF48B1007D1 for ; Thu, 14 Jun 2012 16:06:34 +1000 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1Sf38M-0000UH-HU; Thu, 14 Jun 2012 06:02:18 +0000 Received: from ch1ehsobe002.messaging.microsoft.com ([216.32.181.182] helo=ch1outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1Sf36q-0008F9-FQ for linux-arm-kernel@lists.infradead.org; Thu, 14 Jun 2012 06:00:45 +0000 Received: from mail53-ch1-R.bigfish.com (10.43.68.232) by CH1EHSOBE001.bigfish.com (10.43.70.51) with Microsoft SMTP Server id 14.1.225.23; Thu, 14 Jun 2012 05:59:37 +0000 Received: from mail53-ch1 (localhost [127.0.0.1]) by mail53-ch1-R.bigfish.com (Postfix) with ESMTP id 818DF460418; Thu, 14 Jun 2012 05:59:37 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275dhz2dh87h2a8h668h839hd24he5bhe96hf0ah) X-FB-DOMAIN-IP-MATCH: fail Received: from mail53-ch1 (localhost.localdomain [127.0.0.1]) by mail53-ch1 (MessageSwitch) id 1339653575353789_16961; Thu, 14 Jun 2012 05:59:35 +0000 (UTC) Received: from CH1EHSMHS017.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.247]) by mail53-ch1.bigfish.com (Postfix) with ESMTP id 4D7F34C00B3; Thu, 14 Jun 2012 05:59:35 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CH1EHSMHS017.bigfish.com (10.43.70.17) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 14 Jun 2012 05:59:35 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Thu, 14 Jun 2012 01:00:40 -0500 Received: from S2101-09.ap.freescale.net ([10.192.185.88]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q5E5xmYu000483; Wed, 13 Jun 2012 23:00:37 -0700 From: Shawn Guo To: Subject: [PATCH 10/16] ARM: imx: add a legacy irqdomain for 3ds_debugboard Date: Thu, 14 Jun 2012 13:59:41 +0800 Message-ID: <1339653587-4832-11-git-send-email-shawn.guo@linaro.org> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1339653587-4832-1-git-send-email-shawn.guo@linaro.org> References: <1339653587-4832-1-git-send-email-shawn.guo@linaro.org> MIME-Version: 1.0 X-OriginatorOrg: sigmatel.com X-Spam-Note: CRM114 invocation failed X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [216.32.181.182 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: Arnd Bergmann , Sascha Hauer , Rob Herring , Grant Likely , Shawn Guo , Dong Aisheng X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Call irq_alloc_descs to get the irq_base for 3ds_debugboard, and add a legacy irqdomain using the irq_base, so that the mapping between 3ds_debugboard hardware irq and Linux irq number can be dynamically handled by irqdomain. As the result, the use of MXC_BOARD_IRQ_START can be completely removed from 3ds_debugboard.c. Signed-off-by: Shawn Guo Acked-by: Dong Aisheng --- arch/arm/plat-mxc/3ds_debugboard.c | 42 +++++++++++++++++++++-------------- 1 files changed, 25 insertions(+), 17 deletions(-) diff --git a/arch/arm/plat-mxc/3ds_debugboard.c b/arch/arm/plat-mxc/3ds_debugboard.c index 3b48a08..5c10ad0 100644 --- a/arch/arm/plat-mxc/3ds_debugboard.c +++ b/arch/arm/plat-mxc/3ds_debugboard.c @@ -12,9 +12,11 @@ #include #include +#include #include #include #include +#include #include #include #include @@ -48,26 +50,22 @@ /* CPU ID and Personality ID */ #define MCU_BOARD_ID_REG 0x68 -#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_BOARD_IRQ_START) - -#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) #define MXC_MAX_EXP_IO_LINES 16 /* interrupts like external uart , external ethernet etc*/ -#define EXPIO_INT_ENET (MXC_BOARD_IRQ_START + 0) -#define EXPIO_INT_XUART_A (MXC_BOARD_IRQ_START + 1) -#define EXPIO_INT_XUART_B (MXC_BOARD_IRQ_START + 2) -#define EXPIO_INT_BUTTON_A (MXC_BOARD_IRQ_START + 3) -#define EXPIO_INT_BUTTON_B (MXC_BOARD_IRQ_START + 4) +#define EXPIO_INT_ENET 0 +#define EXPIO_INT_XUART_A 1 +#define EXPIO_INT_XUART_B 2 +#define EXPIO_INT_BUTTON_A 3 +#define EXPIO_INT_BUTTON_B 4 static void __iomem *brd_io; +static struct irq_domain *domain; static struct resource smsc911x_resources[] = { { .flags = IORESOURCE_MEM, } , { - .start = EXPIO_INT_ENET, - .end = EXPIO_INT_ENET, .flags = IORESOURCE_IRQ, }, }; @@ -99,11 +97,11 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) imr_val = __raw_readw(brd_io + INTR_MASK_REG); int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val; - expio_irq = MXC_BOARD_IRQ_START; + expio_irq = 0; for (; int_valid != 0; int_valid >>= 1, expio_irq++) { if ((int_valid & 1) == 0) continue; - generic_handle_irq(expio_irq); + generic_handle_irq(irq_find_mapping(domain, expio_irq)); } desc->irq_data.chip->irq_ack(&desc->irq_data); @@ -117,7 +115,7 @@ static void mxc_expio_irq_handler(u32 irq, struct irq_desc *desc) static void expio_mask_irq(struct irq_data *d) { u16 reg; - u32 expio = MXC_IRQ_TO_EXPIO(d->irq); + u32 expio = d->hwirq; reg = __raw_readw(brd_io + INTR_MASK_REG); reg |= (1 << expio); @@ -126,7 +124,7 @@ static void expio_mask_irq(struct irq_data *d) static void expio_ack_irq(struct irq_data *d) { - u32 expio = MXC_IRQ_TO_EXPIO(d->irq); + u32 expio = d->hwirq; __raw_writew(1 << expio, brd_io + INTR_RESET_REG); __raw_writew(0, brd_io + INTR_RESET_REG); @@ -136,7 +134,7 @@ static void expio_ack_irq(struct irq_data *d) static void expio_unmask_irq(struct irq_data *d) { u16 reg; - u32 expio = MXC_IRQ_TO_EXPIO(d->irq); + u32 expio = d->hwirq; reg = __raw_readw(brd_io + INTR_MASK_REG); reg &= ~(1 << expio); @@ -157,6 +155,7 @@ static struct regulator_consumer_supply dummy_supplies[] = { int __init mxc_expio_init(u32 base, u32 intr_gpio) { u32 p_irq = gpio_to_irq(intr_gpio); + int irq_base; int i; brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K); @@ -186,8 +185,15 @@ int __init mxc_expio_init(u32 base, u32 intr_gpio) __raw_writew(0xFFFF, brd_io + INTR_RESET_REG); __raw_writew(0, brd_io + INTR_RESET_REG); __raw_writew(0x1F, brd_io + INTR_MASK_REG); - for (i = MXC_EXP_IO_BASE; - i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { + + irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id()); + WARN_ON(irq_base < 0); + + domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0, + &irq_domain_simple_ops, NULL); + WARN_ON(!domain); + + for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) { irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID); } @@ -199,6 +205,8 @@ int __init mxc_expio_init(u32 base, u32 intr_gpio) smsc911x_resources[0].start = LAN9217_BASE_ADDR(base); smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1; + smsc911x_resources[1].start = irq_find_mapping(domain, EXPIO_INT_ENET); + smsc911x_resources[1].end = irq_find_mapping(domain, EXPIO_INT_ENET); platform_device_register(&smsc_lan9217_device); return 0;