From patchwork Fri Mar 23 14:31:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dong Aisheng X-Patchwork-Id: 148443 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 598BDB6ED0 for ; Sat, 24 Mar 2012 01:22:48 +1100 (EST) Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1SB5Le-0001OA-9h; Fri, 23 Mar 2012 14:20:10 +0000 Received: from tx2ehsobe005.messaging.microsoft.com ([65.55.88.15] helo=tx2outboundpool.messaging.microsoft.com) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1SB5LX-0001NO-6s for linux-arm-kernel@lists.infradead.org; Fri, 23 Mar 2012 14:20:08 +0000 Received: from mail190-tx2-R.bigfish.com (10.9.14.235) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 14.1.225.23; Fri, 23 Mar 2012 14:19:51 +0000 Received: from mail190-tx2 (localhost [127.0.0.1]) by mail190-tx2-R.bigfish.com (Postfix) with ESMTP id E2A751E00DC; Fri, 23 Mar 2012 14:19:50 +0000 (UTC) X-SpamScore: -2 X-BigFish: VS-2(zz154dMzz1202h1082kzz8275dhz2dh2a8h668h839hd24h) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail190-tx2 (localhost.localdomain [127.0.0.1]) by mail190-tx2 (MessageSwitch) id 1332512388241028_28752; Fri, 23 Mar 2012 14:19:48 +0000 (UTC) Received: from TX2EHSMHS009.bigfish.com (unknown [10.9.14.249]) by mail190-tx2.bigfish.com (Postfix) with ESMTP id 34A622E0045; Fri, 23 Mar 2012 14:19:48 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS009.bigfish.com (10.9.99.109) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 23 Mar 2012 14:19:46 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.1.355.3; Fri, 23 Mar 2012 09:19:54 -0500 Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q2NEJjnn019458; Fri, 23 Mar 2012 07:19:48 -0700 From: Dong Aisheng To: Subject: [PATCH v2 1/1] ARM: imx28: add basic dt support Date: Fri, 23 Mar 2012 22:31:10 +0800 Message-ID: <1332513070-5400-1-git-send-email-b29396@freescale.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-Spam-Note: CRM114 invocation failed X-Spam-Score: -4.2 (----) X-Spam-Report: SpamAssassin version 3.3.2 on merlin.infradead.org summary: Content analysis details: (-4.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.15 listed in list.dnswl.org] -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] Cc: s.hauer@pengutronix.de, rob.herring@calxeda.com, grant.likely@secretlab.ca, marek.vasut@gmail.com, shawn.guo@freescale.com, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.14 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org From: Dong Aisheng This patch includes basic dt support which can boot via nfs rootfs. Signed-off-by: Dong Aisheng --- ChangeLog v1->v2: * Some fixes addressed Rob's review comments. Remove using of OF_DEV_AUXDATA. * Remove mac address from dts file Currently we use the mac address got from uboot to work. Will submit a p separate atch using prom_update_property to fix this issue for driver based on suggestions from Grant and Lothar. * rename mxs-dt.c to mach-mxs.c which is supposed to support mx23 dt too in the future. * add compatible string "fsl,imx28" per Sascha's suggestion * add more devices in dtsi file For those devices still not in use, set the state to "disabled" by default. For other patches i sent with this in the first series like mmc and sdma dt support, i will send out them separately since this patch does not depend on them and does not block you to run dt via nfs rootfs. --- Documentation/devicetree/bindings/arm/fsl.txt | 4 + arch/arm/boot/dts/imx28-evk.dts | 35 +++ arch/arm/boot/dts/imx28.dtsi | 358 +++++++++++++++++++++++++ arch/arm/mach-mxs/Kconfig | 8 + arch/arm/mach-mxs/Makefile | 1 + arch/arm/mach-mxs/clock-mx28.c | 4 + arch/arm/mach-mxs/mach-mxs.c | 69 +++++ 7 files changed, 479 insertions(+), 0 deletions(-) create mode 100644 arch/arm/boot/dts/imx28-evk.dts create mode 100644 arch/arm/boot/dts/imx28.dtsi create mode 100644 arch/arm/mach-mxs/mach-mxs.c diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 54bddda..9f21faf 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -1,6 +1,10 @@ Freescale i.MX Platforms Device Tree Bindings ----------------------------------------------- +i.MX28 Evaluation Kit +Required root node properties: + - compatible = "fsl,imx28-evk", "fsl,imx28"; + i.MX51 Babbage Board Required root node properties: - compatible = "fsl,imx51-babbage", "fsl,imx51"; diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts new file mode 100644 index 0000000..5402495 --- /dev/null +++ b/arch/arm/boot/dts/imx28-evk.dts @@ -0,0 +1,35 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +/include/ "imx28.dtsi" + +/ { + model = "Freescale i.MX28 Evaluation Kit"; + compatible = "fsl,imx28-evk", "fsl,imx28"; + + memory { + device_type = "memory"; + reg = <0x40000000 0x08000000>; + }; + + ahb@80080000 { + ethernet@800f0000 { + phy-mode = "rmii"; + status = "okay"; + }; + + ethernet@800f4000 { + phy-mode = "rmii"; + status = "okay"; + }; + }; +}; diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi new file mode 100644 index 0000000..9152354 --- /dev/null +++ b/arch/arm/boot/dts/imx28.dtsi @@ -0,0 +1,358 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&icoll>; + + aliases { + serial0 = &duart; + }; + + cpus { + cpu@0 { + compatible = "arm,arm926ejs"; + }; + }; + + apb@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x80000>; + ranges; + + apbh@80000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80000000 0x3c900>; + ranges; + + icoll: interrupt-controller@80000000 { + compatible = "fsl,imx28-icoll"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x80000000 0x2000>; + }; + + hsadc@80002000 { + reg = <0x80002000 2000>; + interrupts = <13 87>; + status = "disabled"; + }; + + dma-apbh@80004000 { + reg = <0x80004000 2000>; + status = "disabled"; + }; + + perfmon@80006000 { + reg = <0x80006000 800>; + interrupts = <27>; + status = "disabled"; + }; + + bch@8000a000 { + reg = <0x8000a000 2000>; + interrupts = <41>; + status = "disabled"; + }; + + gpmi@8000c000 { + reg = <0x8000c000 2000>; + interrupts = <42 88>; + status = "disabled"; + }; + + ssp@80010000 { + reg = <0x80010000 2000>; + interrupts = <96 82>; + status = "disabled"; + }; + + ssp@80012000 { + reg = <0x80012000 2000>; + interrupts = <97 83>; + status = "disabled"; + }; + + ssp@80014000 { + reg = <0x80014000 2000>; + interrupts = <98 84>; + status = "disabled"; + }; + + ssp@80016000 { + reg = <0x80016000 2000>; + interrupts = <99 85>; + status = "disabled"; + }; + + pinctrl@80018000 { + reg = <0x80018000 2000>; + status = "disabled"; + }; + + digctl@8001c000 { + reg = <0x8001c000 2000>; + interrupts = <89>; + status = "disabled"; + }; + + etm@80022000 { + reg = <0x80022000 2000>; + status = "disabled"; + }; + + dma-apbx@80024000 { + reg = <0x80024000 2000>; + status = "disabled"; + }; + + dcp@80028000 { + reg = <0x80028000 2000>; + interrupts = <52 53 54>; + status = "disabled"; + }; + + pxp@8002a000 { + reg = <0x8002a000 2000>; + interrupts = <39>; + status = "disabled"; + }; + + ocotp@8002c000 { + reg = <0x8002c000 2000>; + status = "disabled"; + }; + + axi-ahb@8002e000 { + reg = <0x8002e000 2000>; + status = "disabled"; + }; + + lcdif@80030000 { + reg = <0x80030000 2000>; + interrupts = <38 86>; + status = "disabled"; + }; + + can@80032000 { + reg = <0x80032000 2000>; + interrupts = <8>; + status = "disabled"; + }; + + can@80034000 { + reg = <0x80034000 2000>; + interrupts = <9>; + status = "disabled"; + }; + + simdbg@8003c000 { + reg = <0x8003c000 200>; + status = "disabled"; + }; + + simgpmisel@8003c200 { + reg = <0x8003c200 100>; + status = "disabled"; + }; + + simsspsel@8003c300 { + reg = <0x8003c300 100>; + status = "disabled"; + }; + + simmemsel@8003c400 { + reg = <0x8003c400 100>; + status = "disabled"; + }; + + gpiomon@8003c500 { + reg = <0x8003c500 100>; + status = "disabled"; + }; + + simenet@8003c700 { + reg = <0x8003c700 100>; + status = "disabled"; + }; + + armjtag@8003c800 { + reg = <0x8003c800 100>; + status = "disabled"; + }; + }; + + apbx@80040000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80040000 0x40000>; + ranges; + + clkctl@80040000 { + reg = <0x80040000 2000>; + status = "disabled"; + }; + + saif@80042000 { + reg = <0x80042000 2000>; + interrupts = <59 80>; + status = "disabled"; + }; + + power@80044000 { + reg = <0x80044000 2000>; + status = "disabled"; + }; + + saif@80046000 { + reg = <0x80046000 2000>; + interrupts = <58 81>; + status = "disabled"; + }; + + lradc@80050000 { + reg = <0x80050000 2000>; + status = "disabled"; + }; + + spdif@80054000 { + reg = <0x80054000 2000>; + interrupts = <45 66>; + status = "disabled"; + }; + + rtc@80056000 { + reg = <0x80056000 2000>; + interrupts = <28 29>; + status = "disabled"; + }; + + i2c@80058000 { + reg = <0x80058000 2000>; + interrupts = <111 68>; + status = "disabled"; + }; + + i2c@8005a000 { + reg = <0x8005a000 2000>; + interrupts = <110 69>; + status = "disabled"; + }; + + pwm@80064000 { + reg = <0x80064000 2000>; + status = "disabled"; + }; + + timrot@80068000 { + reg = <0x80068000 2000>; + status = "disabled"; + }; + + serial@8006a000 { + reg = <0x8006a000 0x2000>; + interrupts = <112 70 71>; + status = "disabled"; + }; + + serial@8006c000 { + reg = <0x8006c000 0x2000>; + interrupts = <113 72 73>; + status = "disabled"; + }; + + serial@8006e000 { + reg = <0x8006e000 0x2000>; + interrupts = <114 74 75>; + status = "disabled"; + }; + + serial@80070000 { + reg = <0x80070000 0x2000>; + interrupts = <115 76 77>; + status = "disabled"; + }; + + serial@80072000 { + reg = <0x80072000 0x2000>; + interrupts = <116 78 79>; + status = "disabled"; + }; + + duart: serial@80074000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x80074000 0x1000>; + interrupts = <47>; + }; + + usbphy@8007c000 { + reg = <0x8007c000 0x2000>; + status = "disabled"; + }; + + usbphy@8007e000 { + reg = <0x8007e000 0x2000>; + status = "disabled"; + }; + }; + }; + + ahb@80080000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x80080000 0x80000>; + ranges; + + usbctrl@80080000 { + reg = <0x80080000 0x10000>; + status = "disabled"; + }; + + usbctrl@80090000 { + reg = <0x80090000 0x10000>; + status = "disabled"; + }; + + dflpt@800c0000 { + reg = <0x800c0000 0x10000>; + status = "disabled"; + }; + + ethernet@800f0000 { + compatible = "fsl,imx28-fec"; + reg = <0x800f0000 0x4000>; + interrupts = <101>; + status = "disabled"; + }; + + ethernet@800f4000 { + compatible = "fsl,imx28-fec"; + reg = <0x800f4000 0x4000>; + interrupts = <102>; + status = "disabled"; + }; + + switch@800f8000 { + reg = <0x800f8000 0x8000>; + status = "disabled"; + }; + + }; +}; diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index c57f996..c776aef 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig @@ -17,6 +17,14 @@ config SOC_IMX28 comment "MXS platforms:" +config MACH_MXS_DT + bool "Support MXS platforms from device tree" + select SOC_IMX28 + select USE_OF + help + Include support for Freescale MXS platforms(i.MX23 and i.MX28) + using the device tree for discovery + config MACH_STMP378X_DEVB bool "Support STMP378x_devb Platform" select SOC_IMX23 diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile index 908bf9a..8328c45 100644 --- a/arch/arm/mach-mxs/Makefile +++ b/arch/arm/mach-mxs/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_SOC_IMX23) += clock-mx23.o obj-$(CONFIG_SOC_IMX28) += clock-mx28.o +obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o obj-$(CONFIG_MACH_STMP378X_DEVB) += mach-stmp378x_devb.o obj-$(CONFIG_MACH_MX23EVK) += mach-mx23evk.o obj-$(CONFIG_MACH_MX28EVK) += mach-mx28evk.o diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 5d68e41..88ed30c 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c @@ -671,6 +671,10 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk) _REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk) _REGISTER_CLOCK("mxs-saif.1", NULL, saif1_clk) + /* for DT */ + _REGISTER_CLOCK("80074000.serial", NULL, uart_clk) + _REGISTER_CLOCK("800f0000.ethernet", NULL, fec_clk) + _REGISTER_CLOCK("800f4000.ethernet", NULL, fec_clk) }; static int clk_misc_init(void) diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c new file mode 100644 index 0000000..6d1e331 --- /dev/null +++ b/arch/arm/mach-mxs/mach-mxs.c @@ -0,0 +1,69 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2012 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static int __init imx28_icoll_add_irq_domain(struct device_node *np, + struct device_node *interrupt_parent) +{ + irq_domain_add_simple(np, 0); + + return 0; +} + +static const struct of_device_id mxs_irq_match[] __initconst = { + { .compatible = "fsl,imx28-icoll", .data = imx28_icoll_add_irq_domain, }, + { /* sentinel */ } +}; + +static void __init mxs_dt_init_irq(void) +{ + icoll_init_irq(); + of_irq_init(mxs_irq_match); +} + +static void __init imx28_timer_init(void) +{ + mx28_clocks_init(); +} + +static struct sys_timer imx28_timer = { + .init = imx28_timer_init, +}; + +static void __init imx28_machine_init(void) +{ + of_platform_populate(NULL, of_default_bus_match_table, + NULL, NULL); +} + +static const char *imx28_dt_compat[] __initdata = { + "fsl,imx28", + "fsl,imx28-evk", + NULL, +}; + +DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)") + .map_io = mx28_map_io, + .init_irq = mxs_dt_init_irq, + .timer = &imx28_timer, + .init_machine = imx28_machine_init, + .dt_compat = imx28_dt_compat, + .restart = mxs_restart, +MACHINE_END