From patchwork Wed Jun 22 12:25:25 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 101443 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from merlin.infradead.org (merlin.infradead.org [IPv6:2001:4978:20e::2]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 38F1EB6F77 for ; Wed, 22 Jun 2011 22:18:59 +1000 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by merlin.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QZMOK-0003FJ-6R; Wed, 22 Jun 2011 12:18:44 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QZMOJ-0006wy-P9; Wed, 22 Jun 2011 12:18:43 +0000 Received: from tx2ehsobe002.messaging.microsoft.com ([65.55.88.12] helo=TX2EHSOBE004.bigfish.com) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QZMOG-0006wN-Se for linux-arm-kernel@lists.infradead.org; Wed, 22 Jun 2011 12:18:41 +0000 Received: from mail164-tx2-R.bigfish.com (10.9.14.243) by TX2EHSOBE004.bigfish.com (10.9.40.24) with Microsoft SMTP Server id 14.1.225.22; Wed, 22 Jun 2011 12:18:40 +0000 Received: from mail164-tx2 (localhost.localdomain [127.0.0.1]) by mail164-tx2-R.bigfish.com (Postfix) with ESMTP id E71F83049D; Wed, 22 Jun 2011 12:18:39 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail164-tx2 (localhost.localdomain [127.0.0.1]) by mail164-tx2 (MessageSwitch) id 1308745119560766_5209; Wed, 22 Jun 2011 12:18:39 +0000 (UTC) Received: from TX2EHSMHS010.bigfish.com (unknown [10.9.14.248]) by mail164-tx2.bigfish.com (Postfix) with ESMTP id 7B7261160056; Wed, 22 Jun 2011 12:18:39 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS010.bigfish.com (10.9.99.110) with Microsoft SMTP Server (TLS) id 14.1.225.22; Wed, 22 Jun 2011 12:18:39 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.289.8; Wed, 22 Jun 2011 07:18:38 -0500 Received: from localhost.localdomain ([10.29.240.182]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p5MCIXjL027212; Wed, 22 Jun 2011 07:18:37 -0500 (CDT) From: Fabio Estevam To: Subject: [PATCH v2 3/6] ARM: mach-imx/mx27_3ds: Add LCD support Date: Wed, 22 Jun 2011 09:25:25 -0300 Message-ID: <1308745528-22089-3-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.6.0.4 In-Reply-To: <1308745528-22089-2-git-send-email-fabio.estevam@freescale.com> References: <1308745528-22089-1-git-send-email-fabio.estevam@freescale.com> <1308745528-22089-2-git-send-email-fabio.estevam@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110622_081841_072079_A694A3FC X-CRM114-Status: GOOD ( 21.61 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [65.55.88.12 listed in list.dnswl.org] Cc: Fabio Estevam , kernel@pengutronix.de X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org On mx27_3ds board there is a l4f00242t03 LCD that is controlled via CSPI1. Add support for CSPI1 and LCD. Signed-off-by: Fabio Estevam --- Changes since v1: - Rebased on Sascha's for-next branch - Place GPIOs IOMUX into static array arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/mach-mx27_3ds.c | 92 ++++++++++++++++++++++++++++++++++++- 2 files changed, 92 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e8dd22f..0519dd7 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -278,6 +278,7 @@ config MACH_MX27_3DS select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index eb66310..838421c 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -47,6 +48,9 @@ #define SPI2_SS0 IMX_GPIO_NR(4, 21) #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28)) #define PMIC_INT IMX_GPIO_NR(3, 14) +#define SPI1_SS0 IMX_GPIO_NR(4, 28) +#define LCD_RESET IMX_GPIO_NR(1, 3) +#define LCD_ENABLE IMX_GPIO_NR(1, 31) static const int mx27pdk_pins[] __initconst = { /* UART1 */ @@ -95,6 +99,12 @@ static const int mx27pdk_pins[] __initconst = { PE2_PF_USBOTG_DIR, PE24_PF_USBOTG_CLK, PE25_PF_USBOTG_DATA7, + /* CSPI1 */ + PD31_PF_CSPI1_MOSI, + PD30_PF_CSPI1_MISO, + PD29_PF_CSPI1_SCLK, + PD25_PF_CSPI1_RDY, + SPI1_SS0 | GPIO_GPIO | GPIO_OUT, /* CSPI2 */ PD22_PF_CSPI2_SCLK, PD23_PF_CSPI2_MISO, @@ -105,6 +115,31 @@ static const int mx27pdk_pins[] __initconst = { PD18_PF_I2C_CLK, /* PMIC INT */ PMIC_INT | GPIO_GPIO | GPIO_IN, + /* LCD */ + PA5_PF_LSCLK, + PA6_PF_LD0, + PA7_PF_LD1, + PA8_PF_LD2, + PA9_PF_LD3, + PA10_PF_LD4, + PA11_PF_LD5, + PA12_PF_LD6, + PA13_PF_LD7, + PA14_PF_LD8, + PA15_PF_LD9, + PA16_PF_LD10, + PA17_PF_LD11, + PA18_PF_LD12, + PA19_PF_LD13, + PA20_PF_LD14, + PA21_PF_LD15, + PA22_PF_LD16, + PA23_PF_LD17, + PA28_PF_HSYNC, + PA29_PF_VSYNC, + PA30_PF_CONTRAST, + LCD_ENABLE | GPIO_GPIO | GPIO_OUT, + LCD_RESET | GPIO_GPIO | GPIO_OUT, }; static const struct imxuart_platform_data uart_pdata __initconst = { @@ -261,6 +296,13 @@ static struct mc13xxx_platform_data mc13783_pdata = { }; /* SPI */ +static int spi1_chipselect[] = {SPI1_SS0}; + +static const struct spi_imx_master spi1_pdata __initconst = { + .chipselect = spi1_chipselect, + .num_chipselect = ARRAY_SIZE(spi1_chipselect), +}; + static int spi2_internal_chipselect[] = {SPI2_SS0}; static const struct spi_imx_master spi2_pdata __initconst = { @@ -268,6 +310,46 @@ static const struct spi_imx_master spi2_pdata __initconst = { .num_chipselect = ARRAY_SIZE(spi2_internal_chipselect), }; +static struct imx_fb_videomode mx27_3ds_modes[] = { + { /* 480x640 @ 60 Hz */ + .mode = { + .name = "Epson-VGA", + .refresh = 60, + .xres = 480, + .yres = 640, + .pixclock = 41701, + .left_margin = 20, + .right_margin = 41, + .upper_margin = 10, + .lower_margin = 5, + .hsync_len = 20, + .vsync_len = 10, + .sync = FB_SYNC_OE_ACT_HIGH | + FB_SYNC_CLK_INVERT, + .vmode = FB_VMODE_NONINTERLACED, + .flag = 0, + }, + .bpp = 16, + .pcr = 0xFAC08B82, + }, +}; + +static const struct imx_fb_platform_data mx27_3ds_fb_data __initconst = { + .mode = mx27_3ds_modes, + .num_modes = ARRAY_SIZE(mx27_3ds_modes), + .pwmr = 0x00A903FF, + .lscr1 = 0x00120300, + .dmacr = 0x00020010, +}; + +/* LCD */ +static struct l4f00242t03_pdata mx27_3ds_lcd_pdata = { + .reset_gpio = LCD_RESET, + .data_enable_gpio = LCD_ENABLE, + .core_supply = "lcd_2v8", + .io_supply = "vdd_lcdio", +}; + static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { { .modalias = "mc13783", @@ -277,7 +359,13 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = { .platform_data = &mc13783_pdata, .irq = IRQ_GPIOC(14), .mode = SPI_CS_HIGH, - }, + }, { + .modalias = "l4f00242t03", + .max_speed_hz = 5000000, + .bus_num = 0, + .chip_select = 0, /* SS0 */ + .platform_data = &mx27_3ds_lcd_pdata, + }, }; static const struct imxi2c_platform_data mx27_3ds_i2c0_data __initconst = { @@ -310,12 +398,14 @@ static void __init mx27pdk_init(void) imx27_add_fsl_usb2_udc(&otg_device_pdata); imx27_add_spi_imx1(&spi2_pdata); + imx27_add_spi_imx0(&spi1_pdata); spi_register_board_info(mx27_3ds_spi_devs, ARRAY_SIZE(mx27_3ds_spi_devs)); if (mxc_expio_init(MX27_CS5_BASE_ADDR, EXPIO_PARENT_INT)) pr_warn("Init of the debugboard failed, all devices on the debugboard are unusable.\n"); imx27_add_imx_i2c(0, &mx27_3ds_i2c0_data); + imx27_add_imx_fb(&mx27_3ds_fb_data); } static void __init mx27pdk_timer_init(void)