Call flush_dcache_page around PIO data transfers in libata-aff.c

Depending on the direction of the transfer, flush_dcache_page() must be
called either before (ATA_TFLAG_WRITE) or after (!ATA_TFLAG_WRITE) the
data copying to avoid D-cache aliasing with user space or I-D cache
coherency issues (when reading data from an ATA device using PIO, the
kernel dirties the D-cache but there is no flush_dcache_page() required
on Harvard architectures).

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Jeff Garzik <jgarzik@pobox.com>
---

This patch allows the ARM boards to use a rootfs on CompactFlash with
the PATA platform driver.

As Anfei Zhou mentioned in a recent patch ("flush dcache before writing
into page to avoid alias"), on some architectures there may be a
performance benefit in differentiating the flush_dcache_page() calls
based on whether the kernel or the user page needs flushing.

IMHO, we should differentiate based on the direction (kernel reading
or writing from/to such page). In the ARM case with PIPT Harvard caches
(newer processors), the kernel reading from a page that may be mapped in
user space shouldn't need cache flushing. The kernel writing to such
page would require D-cache flushing because of coherency with the
I-cache. Currently on ARM, the latter happens in both cases.

Thanks.


 drivers/ata/libata-sff.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)


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> drivers/ata/libata-sff.c |    6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
>
>diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
>index 741065c..3d3c854 100644
>--- a/drivers/ata/libata-sff.c
>+++ b/drivers/ata/libata-sff.c
>@@ -893,6 +896,9 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
> 				       do_write);
> 	}
> 
>+	if (!do_write)
>+		flush_dcache_page(page);
>+
> 	qc->curbytes += qc->sect_size;
> 	qc->cursg_ofs += qc->sect_size;
 
That part got merged and it leads to a BUG if CONFIG_DEBUG_VM is
enabled. My mips box and arm use page_mapping() in flush_dcache_page()
which has VM_BUG_ON(PageSlab(page)) in it.

Any comments on that?

Sebastian
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On Wed, 2010-03-03 at 08:24 +0000, Sebastian Andrzej Siewior wrote:
> > drivers/ata/libata-sff.c |    6 ++++++
> > 1 files changed, 6 insertions(+), 0 deletions(-)
> >
> >diff --git a/drivers/ata/libata-sff.c b/drivers/ata/libata-sff.c
> >index 741065c..3d3c854 100644
> >--- a/drivers/ata/libata-sff.c
> >+++ b/drivers/ata/libata-sff.c
> >@@ -893,6 +896,9 @@ static void ata_pio_sector(struct ata_queued_cmd *qc)
> >                                      do_write);
> >       }
> >
> >+      if (!do_write)
> >+              flush_dcache_page(page);
> >+
> >       qc->curbytes += qc->sect_size;
> >       qc->cursg_ofs += qc->sect_size;
> 
> That part got merged and it leads to a BUG if CONFIG_DEBUG_VM is
> enabled. My mips box and arm use page_mapping() in flush_dcache_page()
> which has VM_BUG_ON(PageSlab(page)) in it.
> 
> Any comments on that?

There is a long thread on USB HCD and cache coherency on ARM which I
started pretty much at the same time with the libata-sff change. I need
to do some testing but in the view of the discussions in the other
thread, we may not need this patch at all:

http://thread.gmane.org/gmane.linux.usb.general/27072

Basically, the meaning of PG_arch_1 should be page clean rather than
page dirty.