From patchwork Mon Mar 12 11:40:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Preetham Chandru Ramchandra X-Patchwork-Id: 884459 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-ide-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nvidia.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 400GKs1kYcz9sSd for ; Mon, 12 Mar 2018 22:41:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751293AbeCLLlw (ORCPT ); Mon, 12 Mar 2018 07:41:52 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:15784 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751242AbeCLLlv (ORCPT ); Mon, 12 Mar 2018 07:41:51 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Mon, 12 Mar 2018 04:41:48 -0700 Received: from HQMAIL108.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Mon, 12 Mar 2018 04:41:50 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Mon, 12 Mar 2018 04:41:50 -0700 Received: from HQMAIL102.nvidia.com (172.18.146.10) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Mon, 12 Mar 2018 11:41:50 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL102.nvidia.com (172.18.146.10) with Microsoft SMTP Server id 15.0.1347.2 via Frontend Transport; Mon, 12 Mar 2018 11:41:50 +0000 Received: from pchandru-pc.nvidia.com (Not Verified[10.24.37.8]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Mon, 12 Mar 2018 04:41:50 -0700 From: Preetham Chandru Ramchandra To: , , , , CC: , , , , , , Preetham Ramchandra Subject: [PATCH V8 8/9] ata: ahci_tegra: Add AHCI support for Tegra210 Date: Mon, 12 Mar 2018 17:10:37 +0530 Message-ID: <1520854838-21779-9-git-send-email-pchandru@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1520854838-21779-1-git-send-email-pchandru@nvidia.com> References: <1520854838-21779-1-git-send-email-pchandru@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Preetham Ramchandra Add support for the AHCI-compliant Serial ATA host controller on the Tegra210 system-on-chip. Signed-off-by: Preetham Chandru R Acked-by: Thierry Reding --- v8: * renamed the structure tegra210_ahci_soc_data to tegra210_ahci_soc v7: * Added commit message --- drivers/ata/ahci_tegra.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/ata/ahci_tegra.c b/drivers/ata/ahci_tegra.c index 20c1fccbc669..64d848409fe2 100644 --- a/drivers/ata/ahci_tegra.c +++ b/drivers/ata/ahci_tegra.c @@ -465,11 +465,19 @@ static const struct tegra_ahci_soc tegra124_ahci_soc = { .ops = &tegra124_ahci_ops, }; +static const struct tegra_ahci_soc tegra210_ahci_soc = { + .supports_devslp = false, +}; + static const struct of_device_id tegra_ahci_of_match[] = { { .compatible = "nvidia,tegra124-ahci", .data = &tegra124_ahci_soc }, + { + .compatible = "nvidia,tegra210-ahci", + .data = &tegra210_ahci_soc + }, {} }; MODULE_DEVICE_TABLE(of, tegra_ahci_of_match); @@ -584,5 +592,5 @@ static struct platform_driver tegra_ahci_driver = { module_platform_driver(tegra_ahci_driver); MODULE_AUTHOR("Mikko Perttunen "); -MODULE_DESCRIPTION("Tegra124 AHCI SATA driver"); +MODULE_DESCRIPTION("Tegra AHCI SATA driver"); MODULE_LICENSE("GPL v2");