| Message ID | 1402914392-6028-7-git-send-email-antoine.tenart@free-electrons.com |
|---|---|
| State | Not Applicable |
| Delegated to: | David Miller |
| Headers | show |
On 06/16/2014 12:26 PM, Antoine Ténart wrote: > The BG2Q has an AHCI SATA controller. Add the corresponding nodes > (AHCI, PHY) into its device tree. > > Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> > --- > arch/arm/boot/dts/berlin2q.dtsi | 28 ++++++++++++++++++++++++++++ > 1 file changed, 28 insertions(+) > > diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi > index 635a16a64cb4..3fb0d3935aec 100644 > --- a/arch/arm/boot/dts/berlin2q.dtsi > +++ b/arch/arm/boot/dts/berlin2q.dtsi > @@ -303,6 +303,34 @@ > clock-names = "refclk"; > }; > > + ahci: sata@e90000 { > + compatible = "generic-ahci"; > + reg = <0xe90000 0x1000>; > + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&chip CLKID_SATA>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + sata0: sata-port@0 { > + reg = <0>; > + phys = <&sata_phy 0>; > + status = "disabled"; > + }; > + > + sata1: sata-port@1 { > + reg = <1>; > + phys = <&sata_phy 1>; > + status = "disabled"; > + }; > + }; > + > + sata_phy: phy@e900a0 { > + compatible = "marvell,berlin-sata-phy"; > + reg = <0xe900a0 0x200>; Antoine, I guess you'll also need clocks = <&chip CLKID_SATA>; here and corresponding code in the PHY driver. If SATA PHY is accessing SATA registers, disabling the clock will most likely lock-up the SoC. Sebastian > + #phy-cells = <1>; > + status = "disabled"; > + }; > + > apb@fc0000 { > compatible = "simple-bus"; > #address-cells = <1>; > -- To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 635a16a64cb4..3fb0d3935aec 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -303,6 +303,34 @@ clock-names = "refclk"; }; + ahci: sata@e90000 { + compatible = "generic-ahci"; + reg = <0xe90000 0x1000>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&chip CLKID_SATA>; + #address-cells = <1>; + #size-cells = <0>; + + sata0: sata-port@0 { + reg = <0>; + phys = <&sata_phy 0>; + status = "disabled"; + }; + + sata1: sata-port@1 { + reg = <1>; + phys = <&sata_phy 1>; + status = "disabled"; + }; + }; + + sata_phy: phy@e900a0 { + compatible = "marvell,berlin-sata-phy"; + reg = <0xe900a0 0x200>; + #phy-cells = <1>; + status = "disabled"; + }; + apb@fc0000 { compatible = "simple-bus"; #address-cells = <1>;
The BG2Q has an AHCI SATA controller. Add the corresponding nodes (AHCI, PHY) into its device tree. Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> --- arch/arm/boot/dts/berlin2q.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)