From patchwork Tue Mar 11 22:11:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 329241 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 4D2EC2C00AD for ; Wed, 12 Mar 2014 09:12:38 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755835AbaCKWMa (ORCPT ); Tue, 11 Mar 2014 18:12:30 -0400 Received: from exprod5og111.obsmtp.com ([64.18.0.22]:44838 "HELO exprod5og111.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1755741AbaCKWMY (ORCPT ); Tue, 11 Mar 2014 18:12:24 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]) (using TLSv1) by exprod5ob111.postini.com ([64.18.4.12]) with SMTP ID DSNKUx+KR8g68zNck5TdP7jQClkGo5Ty5nC1@postini.com; Tue, 11 Mar 2014 15:12:24 PDT Received: by mail-pa0-f45.google.com with SMTP id kl14so162465pab.32 for ; Tue, 11 Mar 2014 15:12:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g7kVihdBn4xGRC+bY0PBab1yD1+GX1Y97q3qc09UpF0=; b=g6E6EIeTJ6D9JRCGy/TuXIw5YMWdffYvMK1+kmJN/63rA/rhQLYpVIxodGQqzhSuy1 iAZKhzFBl/5sb6wxbC/Z3Z0ZHJ+NrxrYoSiA1MTxv5HVrPUqr36BQMwuP+ki5d8XahQz GHcjbV401WHkHjEtHbS5ZnIN9QreRNSrcFgUC2IPdOa+7XdVctrgJKHYGrs8VEPdTxqW ts1DTKtw0IGS7LD258Lf4zWMBhvZyxN22j/sjrRnhOjegUXgzR5rGFBj6ClDfBtM7J/Q HJdBw8nDg1KQgEg5WiH7FCxbQE4vjP8mKVtt9/lWe2f9pCte3SNv6h5p4HRwmfC/gSHh x6UA== X-Gm-Message-State: ALoCoQmH5GFIXppZBcZ33ePL2KaNUNCvW5uLpUgf879UKLVb6o0NdySLkJ5fKGd9n8BPhBnyi7u212EUuRnfhw0ME9lCnX07aulFZbmZwnT6OguNy4GwfEZ8y7CdzTuW4FL9s/MPuRUFoq1sIRmPRc+1PhbNhDkYZzgM3QdsQfKjuEbQso3N2hE= X-Received: by 10.66.228.201 with SMTP id sk9mr632255pac.134.1394575942854; Tue, 11 Mar 2014 15:12:22 -0700 (PDT) X-Received: by 10.66.228.201 with SMTP id sk9mr632237pac.134.1394575942788; Tue, 11 Mar 2014 15:12:22 -0700 (PDT) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id eb5sm2257615pad.22.2014.03.11.15.12.21 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 11 Mar 2014 15:12:22 -0700 (PDT) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Cc: linux-scsi@vger.kernel.org, linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ddutile@redhat.com, jcm@redhat.com, patches@apm.com, Loc Ho , Tuan Phan , Suman Tripathi Subject: [PATCH v16 4/4] arm64: Add APM X-Gene SoC AHCI SATA host controller DTS entries Date: Tue, 11 Mar 2014 16:11:35 -0600 Message-Id: <1394575895-7039-5-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1394575895-7039-4-git-send-email-lho@apm.com> References: <1394575895-7039-1-git-send-email-lho@apm.com> <1394575895-7039-2-git-send-email-lho@apm.com> <1394575895-7039-3-git-send-email-lho@apm.com> <1394575895-7039-4-git-send-email-lho@apm.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org This patch adds APM X-Gene SoC AHCI SATA host controller DTS entries. Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi --- arch/arm64/boot/dts/apm-storm.dtsi | 75 ++++++++++++++++++++++++++++++++++++ 1 files changed, 75 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/apm-storm.dtsi b/arch/arm64/boot/dts/apm-storm.dtsi index c78ddcf..2a03e96 100644 --- a/arch/arm64/boot/dts/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm-storm.dtsi @@ -221,6 +221,48 @@ enable-offset = <0x0>; enable-mask = <0x06>; }; + + sata01clk: sata01clk@1f21c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f21c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sata01clk"; + csr-offset = <0x4>; + csr-mask = <0x05>; + enable-offset = <0x0>; + enable-mask = <0x39>; + }; + + sata23clk: sata23clk@1f22c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f22c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sata23clk"; + csr-offset = <0x4>; + csr-mask = <0x05>; + enable-offset = <0x0>; + enable-mask = <0x39>; + }; + + sata45clk: sata45clk@1f23c000 { + compatible = "apm,xgene-device-clock"; + #clock-cells = <1>; + clocks = <&socplldiv2 0>; + clock-names = "socplldiv2"; + reg = <0x0 0x1f23c000 0x0 0x1000>; + reg-names = "csr-reg"; + clock-output-names = "sata45clk"; + csr-offset = <0x4>; + csr-mask = <0x05>; + enable-offset = <0x0>; + enable-mask = <0x39>; + }; }; serial0: serial@1c020000 { @@ -262,5 +304,38 @@ apm,tx-boost-gain = <31 31 31 31 31 31>; apm,tx-eye-tuning = <2 10 10 2 10 10>; }; + + sata1: sata@1a000000 { + compatible = "apm,xgene-ahci-sgmii"; + reg = <0x0 0x1a000000 0x0 0x1000>, + <0x0 0x1f210000 0x0 0x10000>; + interrupts = <0x0 0x86 0x4>; + status = "disabled"; + clocks = <&sata01clk 0>; + phys = <&phy1 0>; + phy-names = "sata-phy"; + }; + + sata2: sata@1a400000 { + compatible = "apm,xgene-ahci-sgmii"; + reg = <0x0 0x1a400000 0x0 0x1000>, + <0x0 0x1f220000 0x0 0x10000>; + interrupts = <0x0 0x87 0x4>; + status = "ok"; + clocks = <&sata23clk 0>; + phys = <&phy2 0>; + phy-names = "sata-phy"; + }; + + sata3: sata@1a800000 { + compatible = "apm,xgene-ahci-pcie"; + reg = <0x0 0x1a800000 0x0 0x1000>, + <0x0 0x1f230000 0x0 0x10000>; + interrupts = <0x0 0x88 0x4>; + status = "ok"; + clocks = <&sata45clk 0>; + phys = <&phy3 0>; + phy-names = "sata-phy"; + }; }; };