From patchwork Thu Nov 14 19:31:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loc Ho X-Patchwork-Id: 291345 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id ED5232C00B7 for ; Fri, 15 Nov 2013 06:39:16 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756381Ab3KNTjQ (ORCPT ); Thu, 14 Nov 2013 14:39:16 -0500 Received: from exprod5og106.obsmtp.com ([64.18.0.182]:49624 "HELO exprod5og106.obsmtp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with SMTP id S1756157Ab3KNTjP (ORCPT ); Thu, 14 Nov 2013 14:39:15 -0500 Received: from mail-pb0-f48.google.com ([209.85.160.48]) (using TLSv1) by exprod5ob106.postini.com ([64.18.4.12]) with SMTP ID DSNKUoUm44J1ommViq6YzwNKpuFU7imRame7@postini.com; Thu, 14 Nov 2013 11:39:15 PST Received: by mail-pb0-f48.google.com with SMTP id mc17so2479017pbc.35 for ; Thu, 14 Nov 2013 11:39:14 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZM8aLrBPsHsNOi8hNJJ5gHxE1GEQAI0iawbav3ZPVVc=; b=Ba7F9eEliqK13eRQ2+3WVCuuYChHvTXVEzW37oh1kmMd9CKukh6ZKXwyMJmJ8/F0xc HDvK6tXtiilIwe4ilYv19WrrPSvMJMl2gEUnzp92mVV5DfRHaNnyK7HbStGAqxo4CZIa qcrv0xOWqPo2S/2zaftuuJgTiMwBG2lwxHt+VuMFD6tOT58VofnE9cS0JPBCLHRyxqkP Mf9y9tbA5Fyecs1GNE1TSnRmCYJKsW+82Adqb7Aff+AJ8e2COfpMqM2WACkMPhDDrRAb 4zitmt60jmo3RyMQS0aGuWUy9oO1RChFvQc24s3STGNMkHE0IboruhKW5/1FdKVXXRDl EXGQ== X-Received: by 10.68.252.68 with SMTP id zq4mr3035595pbc.154.1384457540816; Thu, 14 Nov 2013 11:32:20 -0800 (PST) X-Gm-Message-State: ALoCoQm1QnmpKNryHWpZCZCfUU+PBrB7dwltSGTEGlw2SIWuR2iTN/RdHwEXRThWlSaVB7YmiiiXgcqt9AikXTVG+U1hCLoq7G7r9th1DrwyiVFbxOGi//vvVq//EkoMOMGErbqgUrSO+6gdUxKUX20cj1TPeQbTOrtOw9XvuX9IqZaGoB3ig+w= X-Received: by 10.68.252.68 with SMTP id zq4mr3035580pbc.154.1384457540701; Thu, 14 Nov 2013 11:32:20 -0800 (PST) Received: from localhost ([198.137.200.11]) by mx.google.com with ESMTPSA id sy10sm982434pac.15.2013.11.14.11.32.19 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 14 Nov 2013 11:32:20 -0800 (PST) From: Loc Ho To: olof@lixom.net, tj@kernel.org, arnd@arndb.de Cc: linux-scsi@vger.kernel.org, linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jcm@redhat.com, Loc Ho , Tuan Phan , Suman Tripathi Subject: [PATCH 1/3] Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Date: Thu, 14 Nov 2013 12:31:57 -0700 Message-Id: <1384457519-21335-2-git-send-email-lho@apm.com> X-Mailer: git-send-email 1.5.5 In-Reply-To: <1384457519-21335-1-git-send-email-lho@apm.com> References: <1384457519-21335-1-git-send-email-lho@apm.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org Documentation: Add APM X-Gene SoC 6.0Gbps SATA PHY driver binding documentation Document the DTS binding for the X-Gene SoC SATA PHY driver. Signed-off-by: Loc Ho Signed-off-by: Tuan Phan Signed-off-by: Suman Tripathi Reviewed-by: Arnd Bergmann Reviewed-by: Olof Johansson --- .../devicetree/bindings/ata/apm-xgene.txt | 69 ++++++++++++++++++++ 1 files changed, 69 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/ata/apm-xgene.txt diff --git a/Documentation/devicetree/bindings/ata/apm-xgene.txt b/Documentation/devicetree/bindings/ata/apm-xgene.txt new file mode 100644 index 0000000..d18db67 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/apm-xgene.txt @@ -0,0 +1,69 @@ +* APM X-Gene 6.0 Gb/s SATA PHY nodes + +SATA PHY nodes are defined to describe on-chip Serial ATA PHY. Each SATA PHY +(pair of PHY) has its own node. + +Required properties: +- compatible : Shall be "apm,xgene-ahci-phy" +- reg : First memory resource shall be the PHY memory resource + Second memory resource shall be the optional PHY + memory resource if mux'ed with another IP +- id : PHY ID (0 = first, 1 = second, 2 = third) +- #phy-cells : Shall be 0 + +Optional properties: +- status : Shall be "ok" if enabled or "na" if disabled. Default + is "ok". +- CTLE0 : PHY override parameters for channel 0 register REG1 + field CTLE_EQ. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x2. +- CTLE1 : PHY override parameters for channel 1 register REG1 + field CTLE_EQ. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x2. +- PQ0 : PHY override parameters for channel 0 register REG125 + field PQ_REG. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0xA. +- PQ1 : PHY override parameters for channel 1 register REG125 + field PQ_REG. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0xA. +- PQS0 : PHY override parameters for channel 0 register REG125 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x1. +- PQS1 : PHY override parameters for channel 1 register REG125 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x1. +- SPD0 : PHY override parameters for channel 0 register REG61 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x5. +- SPD1 : PHY override parameters for channel 1 register REG61 + field PQ_SIGN. First value for Gen1, second value + for Gen2, and third value for Gen3. Default is 0x5. + +NOTE: PHY override parameters are board specific setting. + +Example: + sataphy0: sataphy@1f210000 { + compatible = "apm,xgene-ahci-phy"; + id = <0>; + reg = <0x0 0x1f210000 0x0 0x10000>; + #phy-cells = <0>; + status = "na"; + }; + + sataphy1: sataphy@1f220000 { + compatible = "apm,xgene-ahci-phy"; + id = <1>; + reg = <0x0 0x1f220000 0x0 0x10000>; + #phy-cells = <0>; + status = "ok"; + }; + + sataphy2: sataphy@1f230000 { + compatible = "apm,xgene-ahci-phy"; + id = <2>; + reg = <0x0 0x1f230000 0x0 0x10000 + 0x0 0x1f2d0000 0x0 0x10000 >; + #phy-cells = <0>; + status = "ok"; + }; +