From patchwork Tue Jul 16 03:28:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Zhu X-Patchwork-Id: 259339 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 092F12C014B for ; Tue, 16 Jul 2013 13:26:27 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755530Ab3GPD00 (ORCPT ); Mon, 15 Jul 2013 23:26:26 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:42739 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755257Ab3GPD00 (ORCPT ); Mon, 15 Jul 2013 23:26:26 -0400 Received: by mail-pa0-f50.google.com with SMTP id fb1so288342pad.23 for ; Mon, 15 Jul 2013 20:26:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=4IZV+EIAUnTiRLl2aaVxbQp6qBWyFvcQkZ+QKzfXrvg=; b=GxYg9tPZBJj35KJR3CEPrjJnXLBhRTF1NBAM2HJmLsGJQLPY9hCV6UdCJMG2CDVLlK tB7QZ7VXPUZG2g76D0VkQzeQzmtE1t8CLj3RcNOk33Zz+Dq3KPBY/cBqx64eapN9wHmz 5x0IptXuQafMfWe4sYdvkqu6/k0FI9DmHFDo5NHos47Nt/AKx3ut5wZKY4xB+EPVVeax 3gizU8JhvpC+eHuqVH7Jclv9ez13feXjb0e3sHoH6qlEHE685JGxDLS9GSOSJlq0CMoj tHlcR5CPIjLQg87Ou8m8je4lKC33OZwbnR5N2kprGzk+AOgUN0pJPWwNFSbyjZpdvS8V fdlA== X-Received: by 10.66.160.74 with SMTP id xi10mr561781pab.8.1373945185359; Mon, 15 Jul 2013 20:26:25 -0700 (PDT) Received: from richard-OptiPlex-780.ap.freescale.net ([123.151.195.1]) by mx.google.com with ESMTPSA id lk9sm1442714pab.2.2013.07.15.20.26.20 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Jul 2013 20:26:24 -0700 (PDT) From: Richard Zhu To: shawn.guo@linaro.org Cc: linux-arm-kernel@lists.infradead.org, jgarzik@pobox.com, tj@kernel.org, rob.herring@calxeda.com, s.hauer@pengutronix.de, linux-ide@vger.kernel.org, Richard Zhu Subject: [v7 1/3] ARM: dtsi: enable ahci sata on imx6q platforms Date: Tue, 16 Jul 2013 11:28:46 +0800 Message-Id: <1373945328-20893-2-git-send-email-Hong-Xing.Zhu@freescale.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1373945328-20893-1-git-send-email-Hong-Xing.Zhu@freescale.com> References: <1373945328-20893-1-git-send-email-Hong-Xing.Zhu@freescale.com> Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org From: Richard Zhu Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: Richard Zhu --- arch/arm/boot/dts/imx6q-sabreauto.dts | 4 ++++ arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++++ arch/arm/boot/dts/imx6q-sabresd.dts | 4 ++++ arch/arm/boot/dts/imx6q.dtsi | 9 +++++++++ 4 files changed, 21 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-sabreauto.dts index 09a7580..18efcbd 100644 --- a/arch/arm/boot/dts/imx6q-sabreauto.dts +++ b/arch/arm/boot/dts/imx6q-sabreauto.dts @@ -20,6 +20,10 @@ compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; }; +&sata { + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 6a00066..6021c99 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -65,6 +65,10 @@ }; }; +&sata { + status = "okay"; +}; + &ecspi1 { fsl,spi-num-chipselects = <1>; cs-gpios = <&gpio3 19 0>; diff --git a/arch/arm/boot/dts/imx6q-sabresd.dts b/arch/arm/boot/dts/imx6q-sabresd.dts index 0038228..d5a90c3 100644 --- a/arch/arm/boot/dts/imx6q-sabresd.dts +++ b/arch/arm/boot/dts/imx6q-sabresd.dts @@ -20,6 +20,10 @@ compatible = "fsl,imx6q-sabresd", "fsl,imx6q"; }; +&sata { + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index e7dd2c4..af64b81 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -424,6 +424,15 @@ }; }; + sata: sata@02200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 0x04>; + clocks = <&clks 154>, <&clks 187>, <&clks 105>; + clock-names = "sata", "sata_ref", "ahb"; + status = "disabled"; + }; + ipu2: ipu@02800000 { #crtc-cells = <1>; compatible = "fsl,imx6q-ipu";