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([2001:470:42c4:101:9af9:b18f:3f69:51be]) by smtp.gmail.com with ESMTPSA id q6-20020a5d9f06000000b007cc6af6686esm1679597iot.30.2024.03.19.22.35.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 Mar 2024 22:35:23 -0700 (PDT) Message-ID: <65fa759b.5d0a0220.fe5f7.1fa0@mx.google.com> From: Sam Edwards X-Google-Original-From: Sam Edwards To: Gregory CLEMENT , Andi Shyti Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Date: Tue, 19 Mar 2024 16:51:51 -0600 Subject: [RESEND v2 RFC 1/5] i2c: mv64xxx: Clear bus errors before transfer Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The MV64XXX hardware can act as either a bus controller or target device. In order to protect target devices from a glitching bus (apparently), the core listens on the lines even when idle and moves the hardware FSM to the "BUS_ERR" state if an invalid transition is detected. The hardware then does not exit this state until reset. This feature is actually counterproductive when using the hardware as a controller (as this driver does): we do not actually *care* what happened on the bus previously, as long as it's ready for use when the new transfer starts. However, the controller will remember a previous glitch and trip up the driver after it attempts to send the start command. The driver logs and error and resets the controller, recovering from the BUS_ERR state, but not without erroring back the transfer with errno EAGAIN. Clients generally do not handle this gracefully. This is easily fixed by checking for the BUS_ERR condition upfront and issuing the hardware reset before beginning the transfer. This patch does NOT also call i2c_recover_bus(): the assumption is that the bus is fine, just the hardware is upset; if the bus is also in a bad state, this should not pass silently. Signed-off-by: Sam Edwards --- drivers/i2c/busses/i2c-mv64xxx.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index fd8403b07fa6..cfc16909fba3 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -753,6 +753,7 @@ mv64xxx_i2c_xfer_core(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); int rc, ret = num; + u32 status; rc = pm_runtime_resume_and_get(&adap->dev); if (rc) @@ -762,6 +763,11 @@ mv64xxx_i2c_xfer_core(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) drv_data->msgs = msgs; drv_data->num_msgs = num; + /* Calm down the hardware if it was upset by a bus glitch while idle */ + status = readl(drv_data->reg_base + drv_data->reg_offsets.status); + if (status == MV64XXX_I2C_STATUS_BUS_ERR) + mv64xxx_i2c_hw_init(drv_data); + if (mv64xxx_i2c_can_offload(drv_data) && !drv_data->atomic) rc = mv64xxx_i2c_offload_xfer(drv_data); else