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([10.237.72.58]) by fmsmga001.fm.intel.com with ESMTP; 06 Feb 2024 06:52:04 -0800 From: Jarkko Nikula To: linux-i2c@vger.kernel.org Cc: Andi Shyti , Andy Shevchenko , Mika Westerberg , Jan Dabros , Jiawen Wu , Sanket Goswami , Basavaraj Natikar , michael.j.ruhl@intel.com, Hans de Goede , Jarkko Nikula Subject: [PATCH v2 1/9] i2c: designware: Add some flexiblity to the model info Date: Tue, 6 Feb 2024 16:51:50 +0200 Message-ID: <20240206145158.227254-2-jarkko.nikula@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240206145158.227254-1-jarkko.nikula@linux.intel.com> References: <20240206145158.227254-1-jarkko.nikula@linux.intel.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: "Michael J. Ruhl" Currently the way to identify a model is via a bit field, of which 4 bits are currently defined. Use a shifted value to that more models can be defined. Reviewed-by: Andy Shevchenko Suggested-by: Andy Shevchenko Signed-off-by: Michael J. Ruhl Signed-off-by: Jarkko Nikula --- drivers/i2c/busses/i2c-designware-core.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h index a7f6f3eafad7..4e1f0924f493 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -304,10 +304,10 @@ struct dw_i2c_dev { #define ACCESS_NO_IRQ_SUSPEND BIT(1) #define ARBITRATION_SEMAPHORE BIT(2) -#define MODEL_MSCC_OCELOT BIT(8) -#define MODEL_BAIKAL_BT1 BIT(9) -#define MODEL_AMD_NAVI_GPU BIT(10) -#define MODEL_WANGXUN_SP BIT(11) +#define MODEL_MSCC_OCELOT (1 << 8) +#define MODEL_BAIKAL_BT1 (2 << 8) +#define MODEL_AMD_NAVI_GPU (3 << 8) +#define MODEL_WANGXUN_SP (4 << 8) #define MODEL_MASK GENMASK(11, 8) /*