Message ID | 20230324175456.219954-2-angelogioacchino.delregno@collabora.com |
---|---|
State | Superseded |
Headers | show
Return-Path: <linux-i2c-owner@vger.kernel.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=2620:137:e000::1:20; helo=out1.vger.email; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=<UNKNOWN>) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=collabora.com header.i=@collabora.com header.a=rsa-sha256 header.s=mail header.b=V8DDDrXv; dkim-atps=neutral Received: from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20]) by legolas.ozlabs.org (Postfix) with ESMTP id 4Pjqds06tRz1yXv for <incoming@patchwork.ozlabs.org>; Sat, 25 Mar 2023 04:56:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231861AbjCXR4a (ORCPT <rfc822;incoming@patchwork.ozlabs.org>); Fri, 24 Mar 2023 13:56:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231915AbjCXR4V (ORCPT <rfc822;linux-i2c@vger.kernel.org>); Fri, 24 Mar 2023 13:56:21 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95E3019B0; Fri, 24 Mar 2023 10:55:57 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2E55F660312D; Fri, 24 Mar 2023 17:55:01 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1679680501; bh=DtLoKecTBQhhvopNsM7M95mpXjvK5USiGMoYC7Oej4w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=V8DDDrXvEKnJazhOMQErYVFVAxvOMaddLoM8wW/X9dN6hBqyE+olcCZFKEJAVJbkc QCwPO9eUvaOSxoVzaBM6SY1n6pJ71VOsy6jP7c0mDxpxckh+PNFeB32VmgzZ8H14gD eo0d6MVr1NejpLN1GuTpDW86G1vh+eXMPi+dfU8McKasvPIC1Pk/v+WFo/okTiPjl1 iFpFIe+42snwHpDGrtCE0i8xVS4HICIOB7w64eRGYvES7dS6+cPELcY4XydKmL060h pqkxUe76Z+MCpR/iu2goQb7ZmmeTmAMrgo5Dz8S/OOzR64CUyPPc5Yh0EQ9QeXMVNG ExclI8fLPPRIg== From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: matthias.bgg@gmail.com Cc: qii.wang@mediatek.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, jassisinghbrar@gmail.com, houlong.wei@mediatek.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Subject: [PATCH v1 01/18] arm64: dts: mediatek: mt6795: Add Frequency Hopping Controller node Date: Fri, 24 Mar 2023 18:54:39 +0100 Message-Id: <20230324175456.219954-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230324175456.219954-1-angelogioacchino.delregno@collabora.com> References: <20230324175456.219954-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-i2c.vger.kernel.org> X-Mailing-List: linux-i2c@vger.kernel.org |
Series |
MT6795 Helio X10 and Sony Xperia M5: DT step 2!
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diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index b3fc76d837a9..4d2119751572 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -310,6 +310,12 @@ systimer: timer@10200670 { clock-names = "clk13m"; }; + fhctl: clock-controller@10209f00 { + compatible = "mediatek,mt6795-fhctl"; + reg = <0 0x10209f00 0 0x100>; + status = "disabled"; + }; + gic: interrupt-controller@10221000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;
Add FHCTL node but keep it disabled as the PLL clocks that should be handled through FHCTL and the Spread Spectrum Clocking parameters are board specific. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)