Message ID | 20211109103552.18677-2-lakshmi.sowjanya.d@intel.com |
---|---|
State | Rejected |
Headers | show |
Series | [v1,1/2] i2c: designware-pci: Add support for Fast Mode Plus and High Speed Mode | expand |
On 11/9/21 12:35 PM, lakshmi.sowjanya.d@intel.com wrote: > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > Set optimal HCNT, LCNT and hold time values for all the speeds supported > in Intel Programmable Service Engine I2C controller in Intel Elkhart > Lake. > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > --- > drivers/i2c/busses/i2c-designware-pcidrv.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > To both: Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote: > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > Set optimal HCNT, LCNT and hold time values for all the speeds supported > in Intel Programmable Service Engine I2C controller in Intel Elkhart > Lake. > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Applied to for-next, thanks!
Hi Jarkko,
> To both:
If it is not causing too much trouble for you, I'd appreciate if you
could ack patches separately. This gives me a better overview in
patchwork which series are completely checked.
Thanks and happy hacking,
Wolfram
On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote: > On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote: > > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > > > Set optimal HCNT, LCNT and hold time values for all the speeds supported > > in Intel Programmable Service Engine I2C controller in Intel Elkhart > > Lake. > > > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > Applied to for-next, thanks! Oh là là! Can we revert these, please? After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for PCI driver") the PCI driver should get this from ACPI tables, no hard coding needed anymore. I did that series to address this very issue. So, Lakshmi, please ask for BIOS fix as we discussed long time ago.
On Tue, Nov 30, 2021 at 11:14:57AM +0200, Andy Shevchenko wrote: > On Mon, Nov 29, 2021 at 05:57:03PM +0100, Wolfram Sang wrote: > > On Tue, Nov 09, 2021 at 04:05:52PM +0530, lakshmi.sowjanya.d@intel.com wrote: > > > From: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > > > > > Set optimal HCNT, LCNT and hold time values for all the speeds supported > > > in Intel Programmable Service Engine I2C controller in Intel Elkhart > > > Lake. > > > > > > Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> > > > > Applied to for-next, thanks! > > Oh là là! Can we revert these, please? > > After the commit 64d0a0755c7d ("i2c: designware: Read counters from ACPI for > PCI driver") the PCI driver should get this from ACPI tables, no hard coding > needed anymore. I did that series to address this very issue. > > So, Lakshmi, please ask for BIOS fix as we discussed long time ago. For the record, I have just checked the DSDT dump I have from Elkhart Lake machine and BIOS provides those counters for devices \_SB.PCI0.I2C0 .. \_SB.PCI0.I2C5 (6 devices altogether). So, BIOS is quite aware of the interface and patches are not needed. I rather add a comment there that these tables in the driver shouldn't be spread and expanded anymore (at least by Intel).
> > > Applied to for-next, thanks! > > > > Oh là là! Can we revert these, please? Okay, both reverted. Thanks for the heads up! > I rather add a comment there that these tables in the driver shouldn't > be spread and expanded anymore (at least by Intel). Please do.
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 174938fc7a7e..3418148f8bb5 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -84,6 +84,19 @@ static struct dw_scl_sda_cfg hsw_config = { .sda_hold = 0x9, }; +/* Elkhart Lake HCNT/LCNT/SDA hold time */ +static struct dw_scl_sda_cfg ehl_config = { + .ss_hcnt = 0x190, + .fs_hcnt = 0x4E, + .fp_hcnt = 0x1A, + .hs_hcnt = 0x1F, + .ss_lcnt = 0x1d6, + .fs_lcnt = 0x96, + .fp_lcnt = 0x32, + .hs_lcnt = 0x36, + .sda_hold = 0x1E, +}; + /* NAVI-AMD HCNT/LCNT/SDA hold time */ static struct dw_scl_sda_cfg navi_amd_config = { .ss_hcnt = 0x1ae, @@ -200,6 +213,7 @@ static struct dw_pci_controller dw_pci_controllers[] = { }, [elkhartlake] = { .bus_num = -1, + .scl_sda_cfg = &ehl_config, .get_clk_rate_khz = ehl_get_clk_rate_khz, }, [navi_amd] = {