From patchwork Mon Nov 2 03:54:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rayagonda Kokatanur X-Patchwork-Id: 1391921 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=broadcom.com header.i=@broadcom.com header.a=rsa-sha256 header.s=google header.b=iQ8Gtgx8; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CPfFl265wz9sVT for ; Mon, 2 Nov 2020 14:55:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727806AbgKBDzW (ORCPT ); Sun, 1 Nov 2020 22:55:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727888AbgKBDzU (ORCPT ); Sun, 1 Nov 2020 22:55:20 -0500 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE115C0617A6 for ; Sun, 1 Nov 2020 19:55:20 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id 10so9923078pfp.5 for ; Sun, 01 Nov 2020 19:55:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=+c09gSHzirt9O+okE0QmVELqHswcOaAl4j0q9ETC4PM=; b=iQ8Gtgx8SIBRHqaEg9LquXzey1/ndXKVZQ27PoBDyhKgLYDGDeRE+3Aau7RBLMGLlp vPG4kprWEVnxe3KPs6XRmT+oW4x0KGixVbhMD22jitI89KFZ+mPn4CByD+m/WCMfJtIk cFMe12BiFF6N9fkFsHo66m9VCH7ILZnjSgT4E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+c09gSHzirt9O+okE0QmVELqHswcOaAl4j0q9ETC4PM=; b=oNJ8InXooX605mLvS+lppbBEXFy3SpqK0swJXUdnfNHihY0AntEx+K9nbA3HCpvnDc P5OR1draiJqqE7m0CKtkFLyk1QNpC8JWAmjwyoxw3f3WQWem3Tck4CaTideFDmNciD2g d0wD9eFh0zu4TKs/pU1EAkxR2XG0Xdvkre97kTht6hEu8YSU0FWwt7QcPmR5APrktzdO /RGdX5ZzMwYumk2t8vFL/mlxwPC2iYIxADekr9pZqttpR/J2+YWPxAJZ8Yg8QK8aUm4/ agQpwZEi+Noyy2RtSfWnf9ErmXiK8MFtKwOCcaP6YnqbMinj/o0hlCbMtFTbRox5rKLH /Zwg== X-Gm-Message-State: AOAM530cdTdyJLEgqg26DFORPDPw/ZkTNFxiQbV83m0YEHVNfU++1CHq qL04pUe5aouTFQ/StEXxjktS3g== X-Google-Smtp-Source: ABdhPJyjhHDYm+I40geGi/eSntY8YCxTXWDj0z8+PdUxieeYJEIi6M04zchVLuzttnIUXwGqK7RZaQ== X-Received: by 2002:a62:e308:0:b029:152:8cc3:ebdc with SMTP id g8-20020a62e3080000b02901528cc3ebdcmr20143680pfh.42.1604289320107; Sun, 01 Nov 2020 19:55:20 -0800 (PST) Received: from rayagonda.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id y5sm5655711pfc.165.2020.11.01.19.55.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Nov 2020 19:55:19 -0800 (PST) From: Rayagonda Kokatanur To: Ray Jui , Scott Branden , bcm-kernel-feedback-list@broadcom.com, Wolfram Sang , Florian Fainelli , Brendan Higgins , Andy Shevchenko , Lori Hikichi , Dhananjay Phadke , linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Rayagonda Kokatanur Subject: [PATCH v3 6/6] i2c: iproc: handle rx fifo full interrupt Date: Mon, 2 Nov 2020 09:24:33 +0530 Message-Id: <20201102035433.6774-7-rayagonda.kokatanur@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201102035433.6774-1-rayagonda.kokatanur@broadcom.com> References: <20201102035433.6774-1-rayagonda.kokatanur@broadcom.com> Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add code to handle IS_S_RX_FIFO_FULL_SHIFT interrupt to support master write request with >= 64 bytes. Iproc has a slave rx fifo size of 64 bytes. Rx fifo full interrupt (IS_S_RX_FIFO_FULL_SHIFT) will be generated when RX fifo becomes full. This can happen if master issues write request of more than 64 bytes. Signed-off-by: Rayagonda Kokatanur --- drivers/i2c/busses/i2c-bcm-iproc.c | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-bcm-iproc.c b/drivers/i2c/busses/i2c-bcm-iproc.c index 22e04055b447..cceaf69279a9 100644 --- a/drivers/i2c/busses/i2c-bcm-iproc.c +++ b/drivers/i2c/busses/i2c-bcm-iproc.c @@ -313,6 +313,8 @@ static void bcm_iproc_i2c_slave_init( /* Enable interrupt register to indicate a valid byte in receive fifo */ val = BIT(IE_S_RX_EVENT_SHIFT); + /* Enable interrupt register to indicate Slave Rx FIFO Full */ + val |= BIT(IE_S_RX_FIFO_FULL_SHIFT); /* Enable interrupt register to indicate a Master read transaction */ val |= BIT(IE_S_RD_EVENT_SHIFT); /* Enable interrupt register for the Slave BUSY command */ @@ -434,9 +436,15 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, * events * Master-read : both IS_S_RX_EVENT_SHIFT and IS_S_RD_EVENT_SHIFT * events or only IS_S_RD_EVENT_SHIFT + * + * iproc has a slave rx fifo size of 64 bytes. Rx fifo full interrupt + * (IS_S_RX_FIFO_FULL_SHIFT) will be generated when RX fifo becomes + * full. This can happen if Master issues write requests of more than + * 64 bytes. */ if (status & BIT(IS_S_RX_EVENT_SHIFT) || - status & BIT(IS_S_RD_EVENT_SHIFT)) { + status & BIT(IS_S_RD_EVENT_SHIFT) || + status & BIT(IS_S_RX_FIFO_FULL_SHIFT)) { /* disable slave interrupts */ val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET); val &= ~iproc_i2c->slave_int_mask; @@ -452,9 +460,14 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, /* schedule tasklet to read data later */ tasklet_schedule(&iproc_i2c->slave_rx_tasklet); - /* clear only IS_S_RX_EVENT_SHIFT interrupt */ - iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, - BIT(IS_S_RX_EVENT_SHIFT)); + /* + * clear only IS_S_RX_EVENT_SHIFT and + * IS_S_RX_FIFO_FULL_SHIFT interrupt. + */ + val = BIT(IS_S_RX_EVENT_SHIFT); + if (status & BIT(IS_S_RX_FIFO_FULL_SHIFT)) + val |= BIT(IS_S_RX_FIFO_FULL_SHIFT); + iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, val); } if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) {