| Message ID | 20200103094821.13185-5-codrin.ciubotariu@microchip.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | i2c bus recovery for Microchip SoCs | expand |
On 2020-01-03 10:49, Codrin.Ciubotariu@microchip.com wrote: > From: Kamel Bouhara <kamel.bouhara@bootlin.com> > > Add the i2c gpio pinctrls to support the i2c bus recovery > > Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> > --- > > Changes in v2: > - none; > > arch/arm/boot/dts/sama5d3.dtsi | 33 ++++++++++++++++++++++++++++++--- > 1 file changed, 30 insertions(+), 3 deletions(-) > *snip* > @@ -639,6 +648,12 @@ > <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ > AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ > }; > + > + pinctrl_i2c0_gpio: i2c0-gpio { > + atmel,pins = > + <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP > + AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; > + }; I'm curious, but why are pull-ups suddenly needed just because the pins are used for GPIO recovery? Why are pull-ups not needed when the pins are used by the I2C peripheral device(s)? Given figure 27-2 "I/O Line Control Logic" in my SAMA5D3 datasheet, I see no difference as to how and why the pull-ups are applied depending on what the current function of the pin is. So, if the I2C bus works w/o pulls, bus recovery using GPIO must also work w/o pulls. I.e. the device tree requires you to have external pull-ups on the I2C bus anyway, so why bother with internal pull-ups for the recovery case? Changing pull-up settings just for recovery feels like something that will inevitably create hard to debug surprises at the least opportune time... Or am I missing something? (I'm focusing on SAMA5D3 since that is what I happen to work with, but the same question appears to apply for SAMA5D2 and SAMA5D4...) Cheers, Peter
On 05.01.2020 00:39, Peter Rosin wrote: > On 2020-01-03 10:49, Codrin.Ciubotariu@microchip.com wrote: >> From: Kamel Bouhara <kamel.bouhara@bootlin.com> >> >> Add the i2c gpio pinctrls to support the i2c bus recovery >> >> Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> >> --- >> >> Changes in v2: >> - none; >> >> arch/arm/boot/dts/sama5d3.dtsi | 33 ++++++++++++++++++++++++++++++--- >> 1 file changed, 30 insertions(+), 3 deletions(-) >> > > *snip* > >> @@ -639,6 +648,12 @@ >> <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ >> AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ >> }; >> + >> + pinctrl_i2c0_gpio: i2c0-gpio { >> + atmel,pins = >> + <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP >> + AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; >> + }; > > I'm curious, but why are pull-ups suddenly needed just because the pins are > used for GPIO recovery? Why are pull-ups not needed when the pins are used > by the I2C peripheral device(s)? > > Given figure 27-2 "I/O Line Control Logic" in my SAMA5D3 datasheet, I see > no difference as to how and why the pull-ups are applied depending on what > the current function of the pin is. So, if the I2C bus works w/o pulls, bus > recovery using GPIO must also work w/o pulls. > > I.e. the device tree requires you to have external pull-ups on the I2C bus > anyway, so why bother with internal pull-ups for the recovery case? > > Changing pull-up settings just for recovery feels like something that will > inevitably create hard to debug surprises at the least opportune time... > > Or am I missing something? > > (I'm focusing on SAMA5D3 since that is what I happen to work with, > but the same question appears to apply for SAMA5D2 and SAMA5D4...) I don't think we need the pull-ups. I will remove them in v3. Thanks and best regards, Codrin
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index f770aace0efd..faf8907d8d7d 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -159,8 +159,11 @@ dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(7)>, <&dma0 2 AT91_DMA_CFG_PER_ID(8)>; dma-names = "tx", "rx"; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c0>; + pinctrl-1 = <&pinctrl_i2c0_gpio>; + sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 31 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi0_clk>; @@ -174,8 +177,11 @@ dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(9)>, <&dma0 2 AT91_DMA_CFG_PER_ID(10)>; dma-names = "tx", "rx"; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + sda-gpios = <&pioC 26 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioC 27 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi1_clk>; @@ -357,8 +363,11 @@ dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(11)>, <&dma1 2 AT91_DMA_CFG_PER_ID(12)>; dma-names = "tx", "rx"; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_gpio>; + sda-gpios = <&pioA 18 GPIO_ACTIVE_HIGH>; + scl-gpios = <&pioA 19 GPIO_ACTIVE_HIGH>; #address-cells = <1>; #size-cells = <0>; clocks = <&twi2_clk>; @@ -639,6 +648,12 @@ <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */ AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */ }; + + pinctrl_i2c0_gpio: i2c0-gpio { + atmel,pins = + <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP + AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; }; i2c1 { @@ -647,6 +662,12 @@ <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */ AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */ }; + + pinctrl_i2c1_gpio: i2c1-gpio { + atmel,pins = + <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP + AT91_PIOC 27 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; }; i2c2 { @@ -655,6 +676,12 @@ <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* TWD2 pin, conflicts with LCDDAT18, ISI_D2 */ AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TWCK2 pin, conflicts with LCDDAT19, ISI_D3 */ }; + + pinctrl_i2c2_gpio: i2c2-gpio { + atmel,pins = + <AT91_PIOA 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP + AT91_PIOA 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + }; }; isi {