From patchwork Fri Sep 29 15:32:59 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Brandt X-Patchwork-Id: 820003 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3y3bFY2sffz9t1G for ; Sat, 30 Sep 2017 01:34:09 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752510AbdI2PeI (ORCPT ); Fri, 29 Sep 2017 11:34:08 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:41659 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752123AbdI2PeH (ORCPT ); Fri, 29 Sep 2017 11:34:07 -0400 Received: from unknown (HELO relmlir2.idc.renesas.com) ([10.200.68.152]) by relmlie2.idc.renesas.com with ESMTP; 30 Sep 2017 00:34:05 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir2.idc.renesas.com (Postfix) with ESMTP id EB1BF3E3E6; Sat, 30 Sep 2017 00:34:05 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.42,452,1500908400"; d="scan'208";a="259243268" Received: from unknown (HELO rtamta01.rta.renesas.com) ([143.103.48.75]) by relmlii2.idc.renesas.com with ESMTP; 30 Sep 2017 00:34:04 +0900 Received: from localhost.localdomain (unknown [143.103.58.190]) by rtamta01.rta.renesas.com (Postfix) with ESMTP id 40D6DA3; Fri, 29 Sep 2017 15:33:59 +0000 (UTC) From: Chris Brandt To: Wolfram Sang Cc: linux-i2c@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Simon Horman , Geert Uytterhoeven , Chris Brandt Subject: [PATCH] i2c: riic: remove fixed clock restriction Date: Fri, 29 Sep 2017 10:32:59 -0500 Message-Id: <20170929153259.105408-1-chris.brandt@renesas.com> X-Mailer: git-send-email 2.14.1 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Most systems with this i2c are going to have a clock of either 33.3MHz or 32MHz. That 4% difference is not reason enough to warrant that the driver to completely fail. Signed-off-by: Chris Brandt --- drivers/i2c/busses/i2c-riic.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index c811af4c8d81..0a61beeb384a 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -299,12 +299,13 @@ static int riic_init_hw(struct riic_dev *riic, u32 spd) /* * TODO: Implement formula to calculate the timing values depending on - * variable parent clock rate and arbitrary bus speed + * variable parent clock rate and arbitrary bus speed. + * For now, just use calculations based on a 33325000Hz clock. */ rate = clk_get_rate(riic->clk); - if (rate != 33325000) { + if (!rate) { dev_err(&riic->adapter.dev, - "invalid parent clk (%lu). Must be 33325000Hz\n", rate); + "invalid parent clk (%lu)\n", rate); clk_disable_unprepare(riic->clk); return -EINVAL; }