| Message ID | 1595548272-9809-5-git-send-email-skomatineni@nvidia.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Support for Tegra video capture from external sensor | expand |
24.07.2020 02:51, Sowjanya Komatineni пишет: > VI I2C is on host1x bus and is part of VE power domain. > > During suspend/resume VE power domain goes through power off/on. > > So, controller reset followed by i2c re-initialization is required > after the domain power up. > > This patch fixes it. > > Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> > --- > drivers/i2c/busses/i2c-tegra.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c > index 7b93c45..1bf3666 100644 > --- a/drivers/i2c/busses/i2c-tegra.c > +++ b/drivers/i2c/busses/i2c-tegra.c > @@ -293,6 +293,8 @@ struct tegra_i2c_dev { > bool is_curr_atomic_xfer; > }; > > +static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit); > + > static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, > unsigned long reg) > { > @@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev) > goto disable_slow_clk; > } > > + /* > + * VI I2C device is attached to VE power domain which goes through > + * power ON/OFF during PM runtime resume/suspend. So, controller > + * should go through reset and need to re-initialize after power > + * domain ON. > + */ > + if (i2c_dev->is_vi) { > + ret = tegra_i2c_init(i2c_dev, true); > + if (ret) > + goto disable_div_clk; > + } > + > return 0; > > +disable_div_clk: > + clk_disable(i2c_dev->div_clk); > disable_slow_clk: > clk_disable(i2c_dev->slow_clk); > disable_fast_clk: > This look okay, but isn't RPM usage a bit too expensive for VI? Maybe RPM autodelay needs to be set for the I2C driver? Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
On 7/26/20 4:53 PM, Dmitry Osipenko wrote: > 24.07.2020 02:51, Sowjanya Komatineni пишет: >> VI I2C is on host1x bus and is part of VE power domain. >> >> During suspend/resume VE power domain goes through power off/on. >> >> So, controller reset followed by i2c re-initialization is required >> after the domain power up. >> >> This patch fixes it. >> >> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> >> --- >> drivers/i2c/busses/i2c-tegra.c | 16 ++++++++++++++++ >> 1 file changed, 16 insertions(+) >> >> diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c >> index 7b93c45..1bf3666 100644 >> --- a/drivers/i2c/busses/i2c-tegra.c >> +++ b/drivers/i2c/busses/i2c-tegra.c >> @@ -293,6 +293,8 @@ struct tegra_i2c_dev { >> bool is_curr_atomic_xfer; >> }; >> >> +static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit); >> + >> static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, >> unsigned long reg) >> { >> @@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev) >> goto disable_slow_clk; >> } >> >> + /* >> + * VI I2C device is attached to VE power domain which goes through >> + * power ON/OFF during PM runtime resume/suspend. So, controller >> + * should go through reset and need to re-initialize after power >> + * domain ON. >> + */ >> + if (i2c_dev->is_vi) { >> + ret = tegra_i2c_init(i2c_dev, true); >> + if (ret) >> + goto disable_div_clk; >> + } >> + >> return 0; >> >> +disable_div_clk: >> + clk_disable(i2c_dev->div_clk); >> disable_slow_clk: >> clk_disable(i2c_dev->slow_clk); >> disable_fast_clk: >> > This look okay, but isn't RPM usage a bit too expensive for VI? Maybe > RPM autodelay needs to be set for the I2C driver? > > Reviewed-by: Dmitry Osipenko <digetx@gmail.com> > Thanks Dmitry. Will look into and have separate patch for VI I2C RPM auto-delay out of this series sometime next week. Regards Sowjanya
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 7b93c45..1bf3666 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -293,6 +293,8 @@ struct tegra_i2c_dev { bool is_curr_atomic_xfer; }; +static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev, bool clk_reinit); + static void dvc_writel(struct tegra_i2c_dev *i2c_dev, u32 val, unsigned long reg) { @@ -675,8 +677,22 @@ static int __maybe_unused tegra_i2c_runtime_resume(struct device *dev) goto disable_slow_clk; } + /* + * VI I2C device is attached to VE power domain which goes through + * power ON/OFF during PM runtime resume/suspend. So, controller + * should go through reset and need to re-initialize after power + * domain ON. + */ + if (i2c_dev->is_vi) { + ret = tegra_i2c_init(i2c_dev, true); + if (ret) + goto disable_div_clk; + } + return 0; +disable_div_clk: + clk_disable(i2c_dev->div_clk); disable_slow_clk: clk_disable(i2c_dev->slow_clk); disable_fast_clk:
VI I2C is on host1x bus and is part of VE power domain. During suspend/resume VE power domain goes through power off/on. So, controller reset followed by i2c re-initialization is required after the domain power up. This patch fixes it. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> --- drivers/i2c/busses/i2c-tegra.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)