From patchwork Tue Dec 18 22:40:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sowjanya Komatineni X-Patchwork-Id: 1015683 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="LZ5QhSJY"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 43KCft4SKLz9s6w for ; Wed, 19 Dec 2018 09:41:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727766AbeLRWlD (ORCPT ); Tue, 18 Dec 2018 17:41:03 -0500 Received: from hqemgate16.nvidia.com ([216.228.121.65]:16335 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727127AbeLRWlB (ORCPT ); Tue, 18 Dec 2018 17:41:01 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 18 Dec 2018 14:40:50 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 18 Dec 2018 14:40:59 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 18 Dec 2018 14:40:59 -0800 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 18 Dec 2018 22:40:59 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Tue, 18 Dec 2018 22:40:59 +0000 Received: from skomatineni-linux.nvidia.com (Not Verified[10.110.103.52]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 18 Dec 2018 14:40:59 -0800 From: Sowjanya Komatineni To: , , , , , , CC: , , , , Sowjanya Komatineni Subject: [PATCH V1 2/2] arm64: dts: tegra186: Device Tree Updates for Tegra186 I2C Date: Tue, 18 Dec 2018 14:40:56 -0800 Message-ID: <1545172856-19509-2-git-send-email-skomatineni@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1545172856-19509-1-git-send-email-skomatineni@nvidia.com> References: <1545172856-19509-1-git-send-email-skomatineni@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1545172851; bh=TjYIi0Rj1xoGKfvWe251EO/dWGZdjZo5q5Gjzf8HXUU=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=LZ5QhSJY9dCTWsWz/mPxwMsRx62Ha5FDpBXnnbJYuOw5dyQKJ/s9TewVnHRlx1e69 xEe7jaGvnofbG3+yT+bI5wsXY90XxP07yYMfUZ/M6fOqAHvPM03kY0Pc1COVeM32Ui w3haz5uZntr1Vn+b5bB5zNvy3M0qbSmB9sHpn9vFLiCoO02UwFowtbyOQL1nCCdBP4 NN/2CU3AMxAykapSPW7vodmJHA5zhJy1ytrgN2CSjlXto2bBraEjAeGqhyskaNMV/k HURadykRtIzKZLTgzbIBgxiBTTeTJjKStBrq0WILKMFdGT43i/qg90fqZ59ZOBJzpC 4DaM1Rd2Z5Ciw== Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Update I2C Device node compatible string to be appropriate. Signed-off-by: Sowjanya Komatineni --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 2f3c8e29520d..31c7278f4c03 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -136,7 +136,7 @@ }; gen1_i2c: i2c@3160000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x03160000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -149,7 +149,7 @@ }; cam_i2c: i2c@3180000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x03180000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -163,7 +163,7 @@ /* shares pads with dpaux1 */ dp_aux_ch1_i2c: i2c@3190000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x03190000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -177,7 +177,7 @@ /* controlled by BPMP, should not be enabled */ pwr_i2c: i2c@31a0000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x031a0000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -191,7 +191,7 @@ /* shares pads with dpaux0 */ dp_aux_ch0_i2c: i2c@31b0000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x031b0000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -204,7 +204,7 @@ }; gen7_i2c: i2c@31c0000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x031c0000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -217,7 +217,7 @@ }; gen9_i2c: i2c@31e0000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x031e0000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -346,7 +346,7 @@ }; gen2_i2c: i2c@c240000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x0c240000 0x0 0x10000>; interrupts = ; #address-cells = <1>; @@ -359,7 +359,7 @@ }; gen8_i2c: i2c@c250000 { - compatible = "nvidia,tegra186-i2c", "nvidia,tegra114-i2c"; + compatible = "nvidia,tegra186-i2c", "nvidia,tegra210-i2c"; reg = <0x0 0x0c250000 0x0 0x10000>; interrupts = ; #address-cells = <1>;