From patchwork Wed Jul 25 03:20:21 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chiang, AlanX" X-Patchwork-Id: 949008 X-Patchwork-Delegate: bartekgola@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-i2c-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 41b0qt340lz9s1x for ; Wed, 25 Jul 2018 13:21:14 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727816AbeGYEao (ORCPT ); Wed, 25 Jul 2018 00:30:44 -0400 Received: from mga02.intel.com ([134.134.136.20]:17200 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725752AbeGYEan (ORCPT ); Wed, 25 Jul 2018 00:30:43 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Jul 2018 20:21:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,400,1526367600"; d="scan'208";a="69673715" Received: from shawn-bm6650-bm6350.itwn.intel.com ([10.5.253.27]) by orsmga003.jf.intel.com with ESMTP; 24 Jul 2018 20:21:04 -0700 From: alanx.chiang@intel.com To: linux-i2c@vger.kernel.org Cc: andy.yeh@intel.com, sakari.ailus@linux.intel.com, andriy.shevchenko@linux.intel.com, andriy.shevchenko@intel.com, rajmohan.mani@intel.com, andy.shevchenko@gmail.com, tfiga@chromium.org, jcliang@chromium.org, brgl@bgdev.pl, robh+dt@kernel.org, mark.rutland@arm.com, arnd@arndb.de, rpjday@crashcourse.ca, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Alan Chiang Subject: [RESEND PATCH v4 1/2] dt-bindings: at24: Add address-width property Date: Wed, 25 Jul 2018 11:20:21 +0800 Message-Id: <1532488822-5622-2-git-send-email-alanx.chiang@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532488822-5622-1-git-send-email-alanx.chiang@intel.com> References: <1532488822-5622-1-git-send-email-alanx.chiang@intel.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org From: Alan Chiang Currently the only way to use a variant of a supported model with a different address with a different address width is to define a new compatible string and the corresponding chip data structure. Provide a flexible way to specify the size of the address pointer by defining a new property: address-width. Signed-off-by: Alan Chiang Signed-off-by: Andy Yeh Acked-by: Sakari Ailus Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/eeprom/at24.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt index 61d833a..aededdb 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.txt +++ b/Documentation/devicetree/bindings/eeprom/at24.txt @@ -72,6 +72,8 @@ Optional properties: - wp-gpios: GPIO to which the write-protect pin of the chip is connected. + - address-width: number of address bits (one of 8, 16). + Example: eeprom@52 {