From patchwork Thu Aug 11 10:17:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 658149 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3s93rQ4C5Jz9rxv for ; Thu, 11 Aug 2016 20:18:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932882AbcHKKSC (ORCPT ); Thu, 11 Aug 2016 06:18:02 -0400 Received: from hqemgate15.nvidia.com ([216.228.121.64]:9708 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932875AbcHKKR7 (ORCPT ); Thu, 11 Aug 2016 06:17:59 -0400 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Thu, 11 Aug 2016 03:17:58 -0700 Received: from HQMAIL108.nvidia.com ([172.18.146.13]) by hqnvupgp08.nvidia.com (PGP Universal service); Thu, 11 Aug 2016 03:14:29 -0700 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Thu, 11 Aug 2016 03:14:29 -0700 Received: from UKMAIL102.nvidia.com (10.26.138.15) by HQMAIL108.nvidia.com (172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 11 Aug 2016 10:17:57 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by UKMAIL102.nvidia.com (10.26.138.15) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Thu, 11 Aug 2016 10:17:54 +0000 Received: from jonathanh-lm.nvidia.com (172.20.13.39) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Thu, 11 Aug 2016 10:17:50 +0000 From: Jon Hunter To: Laxman Dewangan , Wolfram Sang , Stephen Warren , Thierry Reding , Alexandre Courbot CC: , , , Jon Hunter Subject: [PATCH 6/6] i2c: tegra: Add pinctrl support Date: Thu, 11 Aug 2016 11:17:00 +0100 Message-ID: <1470910620-9898-7-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1470910620-9898-1-git-send-email-jonathanh@nvidia.com> References: <1470910620-9898-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org On Tegra124/132 the pins for I2C6 are shared with the Display Port AUX (DPAUX) channel and on Tegra210 the pins for I2C4 and I2C6 are shared with DPAUX1 and DPAUX0, respectively. The multiplexing of the pins is handled by a register in the DPAUX and so the Tegra DPAUX driver has been updated to register a pinctrl device for managing these pins. The pins for these particular I2C devices are bound to the I2C device prior to probing. However, these I2C devices are in a different power partition to the DPAUX devices that own the pins. Hence, it is desirable to place the pins in the 'idle' state and allow the DPAUX power partition to switch off, when these I2C devices is not in use. Therefore, add calls to place the I2C pins in the 'default' and 'idle' states when the I2C device is runtime resumed and suspended, respectively. Please note that the pinctrl functions that set the state of the pins check to see if the devices has pins associated and will return zero if they do not. Therefore, it is safe to call these pinctrl functions even for I2C devices that do not have any pins associated. Signed-off-by: Jon Hunter Acked-by: Laxman Dewangan --- drivers/i2c/busses/i2c-tegra.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 4391a74d7616..189795842aee 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -402,6 +403,10 @@ static int tegra_i2c_runtime_resume(struct device *dev) struct tegra_i2c_dev *i2c_dev = dev_get_drvdata(dev); int ret; + ret = pinctrl_pm_select_default_state(i2c_dev->dev); + if (ret) + return ret; + if (!i2c_dev->hw->has_single_clk_source) { ret = clk_enable(i2c_dev->fast_clk); if (ret < 0) { @@ -430,7 +435,7 @@ static int tegra_i2c_runtime_suspend(struct device *dev) if (!i2c_dev->hw->has_single_clk_source) clk_disable(i2c_dev->fast_clk); - return 0; + return pinctrl_pm_select_idle_state(i2c_dev->dev); } static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev)