From patchwork Thu Apr 14 12:53:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 610447 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3qm12b4jQDz9sCj for ; Thu, 14 Apr 2016 22:59:03 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755393AbcDNM55 (ORCPT ); Thu, 14 Apr 2016 08:57:57 -0400 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:38816 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755037AbcDNM5x (ORCPT ); Thu, 14 Apr 2016 08:57:53 -0400 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u3ECvSTS015750; Thu, 14 Apr 2016 05:57:28 -0700 Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 22718gg4gx-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 14 Apr 2016 05:57:28 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1104.5; Thu, 14 Apr 2016 05:57:27 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1104.5 via Frontend Transport; Thu, 14 Apr 2016 05:57:27 -0700 Received: from xhacker.marvell.com (unknown [10.37.130.135]) by maili.marvell.com (Postfix) with ESMTP id F27983F7040; Thu, 14 Apr 2016 05:57:25 -0700 (PDT) From: Jisheng Zhang To: , , , CC: , , , Jisheng Zhang Subject: [PATCH 2/4] i2c: designware-platdrv: fix unbalanced clk enable and prepare Date: Thu, 14 Apr 2016 20:53:32 +0800 Message-ID: <1460638414-5987-3-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.8.0.rc3 In-Reply-To: <1460638414-5987-1-git-send-email-jszhang@marvell.com> References: <1460638414-5987-1-git-send-email-jszhang@marvell.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-04-14_07:, , signatures=0 X-Proofpoint-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1603180000 definitions=main-1604140186 Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org If i2c_dw_probe() fail, we should call i2c_dw_plat_prepare_clk() to disable and unprepare the clk, otherwise the clk enable and prepare is left unbalanced. Signed-off-by: Jisheng Zhang --- drivers/i2c/busses/i2c-designware-platdrv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c index 00f9e99..1488cea 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -268,6 +268,8 @@ rpm_disable: pm_runtime_put_noidle(&pdev->dev); } + i2c_dw_plat_prepare_clk(dev, false); + return r; }