From patchwork Mon Aug 24 05:59:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 509912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 53D3C14056B for ; Mon, 24 Aug 2015 16:03:17 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932198AbbHXGC5 (ORCPT ); Mon, 24 Aug 2015 02:02:57 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:36418 "EHLO mail-pa0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753982AbbHXGCK (ORCPT ); Mon, 24 Aug 2015 02:02:10 -0400 Received: by padfa11 with SMTP id fa11so1598002pad.3 for ; Sun, 23 Aug 2015 23:02:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m7IiBU2JMBl5pSblZA0lJA4dIxH5Mb+a+ui00atU2sE=; b=k/9eb+ntSTic/9QGr3tUsIKCiy9p+Y6qzt9QR9a4NT2zHQ8MUts/YEbQgwPTJY6T0J n5lT0+VMITTp07T31IJ/W0DZF0vOzgXUlVHCw11DJ9sgPJMy0aWYEmKqKYRPlaadnkh8 80Z2Ca6RipRoLmSM/JvlYX2XyTDPlfKiTLjT/ngYpHkH8vmL1bKxHxseSyOby4SPSZRl uR+2qJ679fpxX9/bVYyHpqzc2JnYkPautEWfL/jonbfttzyvebJ2f+baL8I7MMu+NTsb 1jdmmAUbI+BpZ/Z7VNNVtYP6/atBce2oVP4SNnzHoyPAie5QZaScf4d3cYlzYxJQc1qD g8ow== X-Gm-Message-State: ALoCoQnSFXP8tpd9HIHv+KCs25n2eKDtig2lNoOBJ/bBIpH+nKiJUBiYN4r7ubzu2Bv9CjUEXnLW X-Received: by 10.68.57.234 with SMTP id l10mr42140028pbq.143.1440396129987; Sun, 23 Aug 2015 23:02:09 -0700 (PDT) Received: from localhost.localdomain ([202.62.77.106]) by smtp.gmail.com with ESMTPSA id h16sm15925034pdk.4.2015.08.23.23.02.05 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 23 Aug 2015 23:02:08 -0700 (PDT) From: Vaibhav Hiremath To: linux-arm-kernel@lists.infradead.org Cc: wsa@the-dreams.de, robh+dt@kernel.org, robert.jarzmik@free.fr, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, Vaibhav Hiremath , "Jett.Zhou" , Yi Zhang Subject: [PATCH-v5 RESEND 3/5] i2c: pxa: Add support for pxa910/988 & new configuration features Date: Mon, 24 Aug 2015 11:29:36 +0530 Message-Id: <1440395978-9065-4-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1440395978-9065-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1440395978-9065-1-git-send-email-vaibhav.hiremath@linaro.org> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org TWSI_ILCR & TWSI_IWCR registers are used to adjust clock rate of standard & fast mode in pxa910/988; so this patch adds these two new entries to "struct pxa_reg_layout" and "struct pxa_i2c". As discussed in the previous patch-series, the idea here is to add standard DT properties for ilcr and iwcr configuration fields. In case of Master ilcr is used for low/high time and in case of slave mode of operation iwcr is used for setup/hold time. Signed-off-by: Jett.Zhou Signed-off-by: Yi Zhang Signed-off-by: Vaibhav Hiremath Tested-by: Robert Jarzmik --- drivers/i2c/busses/i2c-pxa.c | 42 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-pxa.c b/drivers/i2c/busses/i2c-pxa.c index abf04f2..8d76197 100644 --- a/drivers/i2c/busses/i2c-pxa.c +++ b/drivers/i2c/busses/i2c-pxa.c @@ -46,12 +46,15 @@ struct pxa_reg_layout { u32 icr; u32 isr; u32 isar; + u32 ilcr; + u32 iwcr; }; enum pxa_i2c_types { REGS_PXA2XX, REGS_PXA3XX, REGS_CE4100, + REGS_PXA910, }; /* @@ -79,12 +82,22 @@ static struct pxa_reg_layout pxa_reg_layout[] = { .isr = 0x04, /* no isar register */ }, + [REGS_PXA910] = { + .ibmr = 0x00, + .idbr = 0x08, + .icr = 0x10, + .isr = 0x18, + .isar = 0x20, + .ilcr = 0x28, + .iwcr = 0x30, + }, }; static const struct platform_device_id i2c_pxa_id_table[] = { { "pxa2xx-i2c", REGS_PXA2XX }, { "pxa3xx-pwri2c", REGS_PXA3XX }, { "ce4100-i2c", REGS_CE4100 }, + { "pxa910-i2c", REGS_PXA910 }, { }, }; MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); @@ -124,6 +137,24 @@ MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table); #define ISR_SAD (1 << 9) /* slave address detected */ #define ISR_BED (1 << 10) /* bus error no ACK/NAK */ +/* bit field shift & mask */ +#define ILCR_SLV_SHIFT 0 +#define ILCR_SLV_MASK (0x1FF << ILCR_SLV_SHIFT) +#define ILCR_FLV_SHIFT 9 +#define ILCR_FLV_MASK (0x1FF << ILCR_FLV_SHIFT) +#define ILCR_HLVL_SHIFT 18 +#define ILCR_HLVL_MASK (0x1FF << ILCR_HLVL_SHIFT) +#define ILCR_HLVH_SHIFT 27 +#define ILCR_HLVH_MASK (0x1F << ILCR_HLVH_SHIFT) + +#define IWCR_CNT_SHIFT 0 +#define IWCR_CNT_MASK (0x1F << IWCR_CNT_SHIFT) +#define IWCR_HS_CNT1_SHIFT 5 +#define IWCR_HS_CNT1_MASK (0x1F << IWCR_HS_CNT1_SHIFT) +#define IWCR_HS_CNT2_SHIFT 10 +#define IWCR_HS_CNT2_MASK (0x1F << IWCR_HS_CNT2_SHIFT) + + struct pxa_i2c { spinlock_t lock; wait_queue_head_t wait; @@ -150,6 +181,8 @@ struct pxa_i2c { void __iomem *reg_icr; void __iomem *reg_isr; void __iomem *reg_isar; + void __iomem *reg_ilcr; + void __iomem *reg_iwcr; unsigned long iobase; unsigned long iosize; @@ -169,6 +202,8 @@ struct pxa_i2c { #define _ICR(i2c) ((i2c)->reg_icr) #define _ISR(i2c) ((i2c)->reg_isr) #define _ISAR(i2c) ((i2c)->reg_isar) +#define _ILCR(i2c) ((i2c)->reg_ilcr) +#define _IWCR(i2c) ((i2c)->reg_iwcr) /* * I2C Slave mode address @@ -1135,7 +1170,7 @@ static const struct i2c_algorithm i2c_pxa_pio_algorithm = { static const struct of_device_id i2c_pxa_dt_ids[] = { { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX }, { .compatible = "mrvl,pwri2c", .data = (void *)REGS_PXA3XX }, - { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA2XX }, + { .compatible = "mrvl,mmp-twsi", .data = (void *)REGS_PXA910 }, {} }; MODULE_DEVICE_TABLE(of, i2c_pxa_dt_ids); @@ -1243,6 +1278,11 @@ static int i2c_pxa_probe(struct platform_device *dev) if (i2c_type != REGS_CE4100) i2c->reg_isar = i2c->reg_base + pxa_reg_layout[i2c_type].isar; + if (i2c_type == REGS_PXA910) { + i2c->reg_ilcr = i2c->reg_base + pxa_reg_layout[i2c_type].ilcr; + i2c->reg_iwcr = i2c->reg_base + pxa_reg_layout[i2c_type].iwcr; + } + i2c->iobase = res->start; i2c->iosize = resource_size(res);