Message ID | 1422014045-20584-3-git-send-email-andriy.shevchenko@linux.intel.com |
---|---|
State | Accepted |
Headers | show |
On Fri, Jan 23, 2015 at 01:54:04PM +0200, Andy Shevchenko wrote: > The clk_khz field makes sense only if SS counters are not provided. Since we > provide them for Haswell and Baytrail explicitly we may omit the clk_khz > parameter. > > Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Applied to for-next, thanks!
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index 435a8ec..cddb20d 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -104,7 +104,6 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 32, .rx_fifo_depth = 32, - .clk_khz = 100000, .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &byt_config, }, @@ -113,7 +112,6 @@ static struct dw_pci_controller dw_pci_controllers[] = { .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, .tx_fifo_depth = 32, .rx_fifo_depth = 32, - .clk_khz = 100000, .functionality = I2C_FUNC_10BIT_ADDR, .scl_sda_cfg = &hsw_config, },