diff mbox

[v1,1/3] i2c: designware-pci: shrink dw_pci_controllers array

Message ID 1421937869-28376-1-git-send-email-andriy.shevchenko@linux.intel.com
State Superseded
Headers show

Commit Message

Andy Shevchenko Jan. 22, 2015, 2:44 p.m. UTC
There is no need to duplicate same data for each controller. If we need
specific stuff for a certain controller in the future we may add it later. The
patch leaves one controller per platform.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/i2c/busses/i2c-designware-pcidrv.c | 96 ++++++------------------------
 1 file changed, 19 insertions(+), 77 deletions(-)

Comments

David Cohen Jan. 22, 2015, 7:03 p.m. UTC | #1
Hi Andy,

On Thu, Jan 22, 2015 at 04:44:27PM +0200, Andy Shevchenko wrote:
> There is no need to duplicate same data for each controller. If we need
> specific stuff for a certain controller in the future we may add it later. The
> patch leaves one controller per platform.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> ---
>  drivers/i2c/busses/i2c-designware-pcidrv.c | 96 ++++++------------------------
>  1 file changed, 19 insertions(+), 77 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
> index acb40f9..9237abb 100644
> --- a/drivers/i2c/busses/i2c-designware-pcidrv.c
> +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
> @@ -40,17 +40,8 @@
>  #define DRIVER_NAME "i2c-designware-pci"
>  
>  enum dw_pci_ctl_id_t {
> -	moorestown_0,
> -	moorestown_1,
> -	moorestown_2,
> -
> -	medfield_0,
> -	medfield_1,
> -	medfield_2,
> -	medfield_3,
> -	medfield_4,
> -	medfield_5,
> -
> +	moorestown,

Since you're doing this rework, could you remove moorestown for good?
It's no longer supported as one of intel mid's platform anyway.

Br, David
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Wolfram Sang Jan. 22, 2015, 7:17 p.m. UTC | #2
> Since you're doing this rework, could you remove moorestown for good?
> It's no longer supported as one of intel mid's platform anyway.

If support for that platform is not broken anyhow, I'd say let's keep
it. There still might be users out there...
David Cohen Jan. 22, 2015, 10:27 p.m. UTC | #3
On Thu, Jan 22, 2015 at 08:17:58PM +0100, Wolfram Sang wrote:
> 
> > Since you're doing this rework, could you remove moorestown for good?
> > It's no longer supported as one of intel mid's platform anyway.
> 
> If support for that platform is not broken anyhow, I'd say let's keep
> it. There still might be users out there...
> 

It actually is. When Medfield, Clover Trail and Merrifield support was
merged, Moorefield support became broken with no interest from anybody
to fix it. It's time now to remove all of its code :)

Br, David

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Andy Shevchenko Jan. 23, 2015, 11:57 a.m. UTC | #4
On Thu, 2015-01-22 at 14:27 -0800, David Cohen wrote:
> On Thu, Jan 22, 2015 at 08:17:58PM +0100, Wolfram Sang wrote:
> > 
> > > Since you're doing this rework, could you remove moorestown for good?
> > > It's no longer supported as one of intel mid's platform anyway.
> > 
> > If support for that platform is not broken anyhow, I'd say let's keep
> > it. There still might be users out there...
> > 
> 
> It actually is. When Medfield, Clover Trail and Merrifield support was
> merged, Moorefield support became broken with no interest from anybody
> to fix it. It's time now to remove all of its code :)

You perhaps meant Moorestown.
David Cohen Jan. 23, 2015, 5:50 p.m. UTC | #5
On Fri, Jan 23, 2015 at 01:57:29PM +0200, Andy Shevchenko wrote:
> On Thu, 2015-01-22 at 14:27 -0800, David Cohen wrote:
> > On Thu, Jan 22, 2015 at 08:17:58PM +0100, Wolfram Sang wrote:
> > > 
> > > > Since you're doing this rework, could you remove moorestown for good?
> > > > It's no longer supported as one of intel mid's platform anyway.
> > > 
> > > If support for that platform is not broken anyhow, I'd say let's keep
> > > it. There still might be users out there...
> > > 
> > 
> > It actually is. When Medfield, Clover Trail and Merrifield support was
> > merged, Moorefield support became broken with no interest from anybody
> > to fix it. It's time now to remove all of its code :)
> 
> You perhaps meant Moorestown.

Oops. Sorry for the typo. Yes, I meant Morrestown :)

Br, David
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David Cohen Jan. 23, 2015, 6:56 p.m. UTC | #6
On Fri, Jan 23, 2015 at 09:50:44AM -0800, David Cohen wrote:
> On Fri, Jan 23, 2015 at 01:57:29PM +0200, Andy Shevchenko wrote:
> > On Thu, 2015-01-22 at 14:27 -0800, David Cohen wrote:
> > > On Thu, Jan 22, 2015 at 08:17:58PM +0100, Wolfram Sang wrote:
> > > > 
> > > > > Since you're doing this rework, could you remove moorestown for good?
> > > > > It's no longer supported as one of intel mid's platform anyway.
> > > > 
> > > > If support for that platform is not broken anyhow, I'd say let's keep
> > > > it. There still might be users out there...
> > > > 
> > > 
> > > It actually is. When Medfield, Clover Trail and Merrifield support was
> > > merged, Moorefield support became broken with no interest from anybody
> > > to fix it. It's time now to remove all of its code :)
> > 
> > You perhaps meant Moorestown.
> 
> Oops. Sorry for the typo. Yes, I meant Morrestown :)

Grrr... Moorestown :)

> 
> Br, David
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diff mbox

Patch

diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index acb40f9..9237abb 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -40,17 +40,8 @@ 
 #define DRIVER_NAME "i2c-designware-pci"
 
 enum dw_pci_ctl_id_t {
-	moorestown_0,
-	moorestown_1,
-	moorestown_2,
-
-	medfield_0,
-	medfield_1,
-	medfield_2,
-	medfield_3,
-	medfield_4,
-	medfield_5,
-
+	moorestown,
+	medfield,
 	baytrail,
 	haswell,
 };
@@ -102,68 +93,19 @@  static struct dw_scl_sda_cfg hsw_config = {
 };
 
 static struct  dw_pci_controller  dw_pci_controllers[] = {
-	[moorestown_0] = {
-		.bus_num     = 0,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[moorestown_1] = {
-		.bus_num     = 1,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[moorestown_2] = {
-		.bus_num     = 2,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[medfield_0] = {
-		.bus_num     = 0,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[medfield_1] = {
-		.bus_num     = 1,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[medfield_2] = {
-		.bus_num     = 2,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[medfield_3] = {
-		.bus_num     = 3,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_STD,
-		.tx_fifo_depth = 32,
-		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
-	},
-	[medfield_4] = {
-		.bus_num     = 4,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
+	[moorestown] = {
+		.bus_num = -1,
+		.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 		.tx_fifo_depth = 32,
 		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
+		.clk_khz = 25000,
 	},
-	[medfield_5] = {
-		.bus_num     = 5,
-		.bus_cfg   = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
+	[medfield] = {
+		.bus_num = -1,
+		.bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
 		.tx_fifo_depth = 32,
 		.rx_fifo_depth = 32,
-		.clk_khz      = 25000,
+		.clk_khz = 25000,
 	},
 	[baytrail] = {
 		.bus_num = -1,
@@ -326,16 +268,16 @@  MODULE_ALIAS("i2c_designware-pci");
 
 static const struct pci_device_id i2_designware_pci_ids[] = {
 	/* Moorestown */
-	{ PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
-	{ PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
-	{ PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
+	{ PCI_VDEVICE(INTEL, 0x0802), moorestown },
+	{ PCI_VDEVICE(INTEL, 0x0803), moorestown },
+	{ PCI_VDEVICE(INTEL, 0x0804), moorestown },
 	/* Medfield */
-	{ PCI_VDEVICE(INTEL, 0x0817), medfield_3,},
-	{ PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
-	{ PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
-	{ PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
-	{ PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
-	{ PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
+	{ PCI_VDEVICE(INTEL, 0x0817), medfield },
+	{ PCI_VDEVICE(INTEL, 0x0818), medfield },
+	{ PCI_VDEVICE(INTEL, 0x0819), medfield },
+	{ PCI_VDEVICE(INTEL, 0x082c), medfield },
+	{ PCI_VDEVICE(INTEL, 0x082d), medfield },
+	{ PCI_VDEVICE(INTEL, 0x082e), medfield },
 	/* Baytrail */
 	{ PCI_VDEVICE(INTEL, 0x0F41), baytrail },
 	{ PCI_VDEVICE(INTEL, 0x0F42), baytrail },