From patchwork Wed Oct 29 05:37:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xudong Chen X-Patchwork-Id: 404437 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id D3BBD140077 for ; Wed, 29 Oct 2014 16:46:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752403AbaJ2Fps (ORCPT ); Wed, 29 Oct 2014 01:45:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:49425 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752843AbaJ2Fpq (ORCPT ); Wed, 29 Oct 2014 01:45:46 -0400 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1719080045; Wed, 29 Oct 2014 13:40:34 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 29 Oct 2014 13:40:34 +0800 From: Xudong Chen To: Mark Rutland , , Matthias Brugger , Wolfram Sang CC: , Sascha Hauer , Rob Herring , Pawel Moll , Ian Campbell , Kumar Gala , Russell King , Grant Likely , Xudong Chen , Jean Delvare , Arnd Bergmann , , , , , Yingjoe Chen , Eddie Huang , Nathan Chung , YH Chen Subject: [PATCH 2/3] ARM: mediatek: Add I2C node for mt8135 and mt8127 Date: Wed, 29 Oct 2014 13:37:37 +0800 Message-ID: <1414561058-23803-3-git-send-email-xudong.chen@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1414561058-23803-1-git-send-email-xudong.chen@mediatek.com> References: <1414561058-23803-1-git-send-email-xudong.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add I2C node to mt8135.dtsi and mt8127.dtsi Signed-off-by: Xudong Chen --- arch/arm/boot/dts/mt8127.dtsi | 27 +++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 51 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi index 25c9f69..60d7685e 100644 --- a/arch/arm/boot/dts/mt8127.dtsi +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -89,5 +89,32 @@ <0 0x10214000 0 0x2000>, <0 0x10216000 0 0x2000>; }; + + i2c0: i2c@11007000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt8127-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + mediatek,have-dcm; + }; }; }; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index 221ce09..1fbfc92 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -119,7 +119,58 @@ <0 0x1020C000 0 0x1000>; gpio-controller; #gpio-cells = <2>; + + i2c0_pins_a: i2c0@0 { + mediatek,pins = , + ; + }; + + i2c1_pins_a: i2c1@0 { + mediatek,pins = , + ; + }; + + i2c2_pins_a: i2c2@0 { + mediatek,pins = , + ; + }; + + i2c3_pins_a: i2c3@0 { + mediatek,pins = , + ; + }; }; + i2c0: i2c@1100d000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x1100d000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + }; + + i2c1: i2c@1100e000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x1100e000 0 0x70>, + <0 0x11000380 0 0x80>; + interrupts = ; + }; + + i2c2: i2c@1100f000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x1100f000 0 0x70>, + <0 0x11000400 0 0x80>; + interrupts = ; + }; + + i2c3: i2c@11010000 { + compatible = "mediatek,mt8135-i2c", + "mediatek,mt6577-i2c"; + reg = <0 0x11010000 0 0x70>, + <0 0x11000480 0 0x80>; + interrupts = ; + }; }; };