diff mbox series

[v5,5/7] gpio: pca953x: fix address calculation for pcal6524

Message ID aaac818909d71523726094b1dfacc03e756874e9.1524933096.git.hns@goldelico.com
State New
Headers show
Series pcal6524 extensions and fixes for pca953x driver | expand

Commit Message

H. Nikolaus Schaller April 28, 2018, 4:31 p.m. UTC
The register constants are so far defined in a way that they fit
for the pcal9555a when shifted by the number of banks, i.e. are
multiplied by 2 in the accessor function.

Now, the pcal6524 has 3 banks which means the relative offset
is multiplied by 4 for the standard registers.

Simply applying the bit shift to the extended registers gives
a wrong result, since the base offset is already included in
the offset.

Therefore, we add code to the 24 bit accessor functions to
adjust the register number for these exended registers.

Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
---
 drivers/gpio/gpio-pca953x.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

Comments

Andy Shevchenko May 2, 2018, 12:28 p.m. UTC | #1
On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller <hns@goldelico.com> wrote:
> The register constants are so far defined in a way that they fit
> for the pcal9555a when shifted by the number of banks, i.e. are
> multiplied by 2 in the accessor function.
>
> Now, the pcal6524 has 3 banks which means the relative offset
> is multiplied by 4 for the standard registers.
>
> Simply applying the bit shift to the extended registers gives
> a wrong result, since the base offset is already included in
> the offset.
>
> Therefore, we add code to the 24 bit accessor functions to
> adjust the register number for these exended registers.
>

Suggested-by ?

> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
> ---
>  drivers/gpio/gpio-pca953x.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
> index fc863faa3ce4..4194495a7990 100644
> --- a/drivers/gpio/gpio-pca953x.c
> +++ b/drivers/gpio/gpio-pca953x.c
> @@ -221,9 +221,11 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
>  static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
>  {
>         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
> +       int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
> +       int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
>
>         return i2c_smbus_write_i2c_block_data(chip->client,
> -                                             (reg << bank_shift) | REG_ADDR_AI,
> +                                             pinctrl | addr | REG_ADDR_AI,
>                                               NBANK(chip), val);
>  }
>
> @@ -263,9 +265,11 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
>  static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
>  {
>         int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
> +       int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
> +       int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
>
>         return i2c_smbus_read_i2c_block_data(chip->client,
> -                                            (reg << bank_shift) | REG_ADDR_AI,
> +                                            pinctrl | addr | REG_ADDR_AI,
>                                              NBANK(chip), val);
>  }
>
> --
> 2.12.2
>
H. Nikolaus Schaller May 2, 2018, 12:35 p.m. UTC | #2
Hi Andy,

> Am 02.05.2018 um 14:28 schrieb Andy Shevchenko <andy.shevchenko@gmail.com>:
> 
> On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller <hns@goldelico.com> wrote:
>> The register constants are so far defined in a way that they fit
>> for the pcal9555a when shifted by the number of banks, i.e. are
>> multiplied by 2 in the accessor function.
>> 
>> Now, the pcal6524 has 3 banks which means the relative offset
>> is multiplied by 4 for the standard registers.
>> 
>> Simply applying the bit shift to the extended registers gives
>> a wrong result, since the base offset is already included in
>> the offset.
>> 
>> Therefore, we add code to the 24 bit accessor functions to
>> adjust the register number for these exended registers.
>> 
> 
> Suggested-by ?

Detecting that we need to adjust the registers generally was from me,
but your suggestion of an improved formula should of course be mentioned
and appreciated!

I'll think about a good formulation for v6.

BR and thanks,
Nikolaus

> 
>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>> ---
>> drivers/gpio/gpio-pca953x.c | 8 ++++++--
>> 1 file changed, 6 insertions(+), 2 deletions(-)
>> 
>> diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
>> index fc863faa3ce4..4194495a7990 100644
>> --- a/drivers/gpio/gpio-pca953x.c
>> +++ b/drivers/gpio/gpio-pca953x.c
>> @@ -221,9 +221,11 @@ static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
>> static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
>> {
>>        int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
>> +       int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
>> +       int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
>> 
>>        return i2c_smbus_write_i2c_block_data(chip->client,
>> -                                             (reg << bank_shift) | REG_ADDR_AI,
>> +                                             pinctrl | addr | REG_ADDR_AI,
>>                                              NBANK(chip), val);
>> }
>> 
>> @@ -263,9 +265,11 @@ static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
>> static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
>> {
>>        int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
>> +       int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
>> +       int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
>> 
>>        return i2c_smbus_read_i2c_block_data(chip->client,
>> -                                            (reg << bank_shift) | REG_ADDR_AI,
>> +                                            pinctrl | addr | REG_ADDR_AI,
>>                                             NBANK(chip), val);
>> }
>> 
>> --
>> 2.12.2
>> 
> 
> 
> 
> -- 
> With Best Regards,
> Andy Shevchenko

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Andy Shevchenko May 5, 2018, 10:29 a.m. UTC | #3
On Fri, May 4, 2018 at 10:30 AM, H. Nikolaus Schaller <hns@goldelico.com> wrote:
>> Am 02.05.2018 um 14:35 schrieb H. Nikolaus Schaller <hns@goldelico.com>:

>>> Suggested-by ?
>>
>> Detecting that we need to adjust the registers generally was from me,
>> but your suggestion of an improved formula should of course be mentioned
>> and appreciated!
>>
>> I'll think about a good formulation for v6.
>
> Would the following commit message be ok for you?

Yes, it's perfect.

>
> ...
>
> Therefore, we have to add code to the 24 bit accessor functions
> that adjusts the register number for these exended registers.
>
> The formula finally used was developed and proposed by
> Andy Shevchenko <andy.shevchenko@gmail.com>.
>
> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index fc863faa3ce4..4194495a7990 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -221,9 +221,11 @@  static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 {
 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
+	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
+	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 
 	return i2c_smbus_write_i2c_block_data(chip->client,
-					      (reg << bank_shift) | REG_ADDR_AI,
+					      pinctrl | addr | REG_ADDR_AI,
 					      NBANK(chip), val);
 }
 
@@ -263,9 +265,11 @@  static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
 {
 	int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
+	int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
+	int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 
 	return i2c_smbus_read_i2c_block_data(chip->client,
-					     (reg << bank_shift) | REG_ADDR_AI,
+					     pinctrl | addr | REG_ADDR_AI,
 					     NBANK(chip), val);
 }