| Message ID | CACRpkdaomX3PGdf9LPvi+S2yzTCs0f-G+TJkdfo=5HcoOJjehg@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [GIT,PULL] pin control fixes for v5.4 | expand |
The pull request you sent on Sun, 10 Nov 2019 01:26:26 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.4-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/4763c0894a2b65f7ff97b3baa368246bb3ba2480
Thank you!
Hi Linus, some late pin control fixes, mostly Intel stuff. Details in the signed tag and the commits! Please pull it in! Yours, Linus Walleij The following changes since commit d6d5df1db6e9d7f8f76d2911707f7d5877251b02: Linux 5.4-rc5 (2019-10-27 13:19:19 -0400) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.4-3 for you to fetch changes up to 63e006c107ff4235d2a8fd52704f283d23642537: pinctrl: stmfx: fix valid_mask init sequence (2019-11-07 10:06:46 +0100) ---------------------------------------------------------------- Pin control fixes for v5.4: - Fix glitch risks in the Intel GPIO - Fix the Intel Cherryview valid irq mask calculation. - Allocate the Intel Cherryview irqchip dynamically. - Fix the valid mask init sequency on the ST STMFX driver. ---------------------------------------------------------------- Amelie Delaunay (1): pinctrl: stmfx: fix valid_mask init sequence Andy Shevchenko (2): pinctrl: intel: Avoid potential glitches if pin is in GPIO mode pinctrl: cherryview: Allocate IRQ chip dynamic Hans de Goede (1): pinctrl: cherryview: Fix irq_valid_mask calculation Linus Walleij (1): Merge tag 'intel-pinctrl-fixes-v5.4-2' of git://git.kernel.org/.../pinctrl/intel into fixes drivers/pinctrl/intel/pinctrl-cherryview.c | 26 +++++++++++++------------- drivers/pinctrl/intel/pinctrl-intel.c | 21 ++++++++++++++++++++- drivers/pinctrl/pinctrl-stmfx.c | 14 -------------- 3 files changed, 33 insertions(+), 28 deletions(-)