| Message ID | CACRpkdYD3585mDYKNH2dZhOncpef4WJkm0iEGA7g38aghj7Xvg@mail.gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | [GIT,PULL] Late pin control fixes for v5.10 | expand |
The pull request you sent on Fri, 11 Dec 2020 09:52:54 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.10-3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/94801e5c6d461045726e1563ba2369ef7ce21dbf
Thank you!
Hi Linus, here is a late set of pin control fixes for v5.10, most concern some minor and major issues found in the Intel drivers. Some are so hairy that I have no idea what is going on there, but luckily the maintainer knows what's up. We also have an interesting fix for AMD, which makes AMD-based laptops more stable IIUC. Please pull it in! Yours, Linus Walleij The following changes since commit 09162bc32c880a791c6c0668ce0745cf7958f576: Linux 5.10-rc4 (2020-11-15 16:44:31 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git tags/pinctrl-v5.10-3 for you to fetch changes up to e8873c0afd34beb67ec492cd648dd0095b911f65: pinctrl: intel: Actually disable Tx and Rx buffers on GPIO request (2020-12-09 09:08:18 +0100) ---------------------------------------------------------------- Pin control fixes for the v5.10 kernel cycle: - Fix up some SPI group and a register offset on Intel Jasperlake. - Set default bias on Intel Merrifield. - Preserve debouncing on Intel Baytrail. - Stop .set_type() irqchip callback in the AMD driver from fiddling with the debounce filter. - Fix access to GPIO banks that are pass-thru on the Aspeed. - Fix a fix for the Intel pin control driver to disable Rx/Tx when requesting a UART line as GPIO. ---------------------------------------------------------------- Andrew Jeffery (1): pinctrl: aspeed: Fix GPIO requests on pass-through banks Andy Shevchenko (4): pinctrl: jasperlake: Unhide SPI group of pins pinctrl: merrifield: Set default bias in case no particular value given pinctrl: baytrail: Avoid clearing debounce value when turning it off pinctrl: intel: Actually disable Tx and Rx buffers on GPIO request Coiby Xu (1): pinctrl: amd: remove debounce filter setting in IRQ type setting Evan Green (1): pinctrl: jasperlake: Fix HOSTSW_OWN offset Linus Walleij (1): Merge tag 'intel-pinctrl-v5.10-3' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes drivers/pinctrl/aspeed/pinctrl-aspeed.c | 74 ++++- drivers/pinctrl/aspeed/pinmux-aspeed.h | 7 +- drivers/pinctrl/intel/pinctrl-baytrail.c | 8 +- drivers/pinctrl/intel/pinctrl-intel.c | 4 +- drivers/pinctrl/intel/pinctrl-jasperlake.c | 452 +++++++++++++++-------------- drivers/pinctrl/intel/pinctrl-merrifield.c | 8 + drivers/pinctrl/pinctrl-amd.c | 7 - 7 files changed, 320 insertions(+), 240 deletions(-)